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freedreno/a6xx: Move assert
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The flags_regid is only present if gs is present (in which case, gs is
the last_shader).  If there is no gs, flags_regid is initialized to
zero, not INVALID_REG (r63.x).  But you have to scroll up several pages
of a long fxn to see that.

Move the assert to make things more clear.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39029>
This commit is contained in:
Rob Clark 2025-12-19 14:23:31 -08:00 • committed by Marge Bot
parent fdf90697e6
commit c430f394c5
1 changed files with 3 additions and 3 deletions
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6
src/gallium/drivers/freedreno/a6xx/fd6_program.cc
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@ -882,9 +882,6 @@ emit_vpc(fd_crb &crb, const struct program_builder *b)
} }
} }
/* if vertex_flags somehow gets optimized out, your gonna have a bad time: */
assert(flags_regid != INVALID_REG);
switch (last_shader->type) { switch (last_shader->type) {
case MESA_SHADER_VERTEX: case MESA_SHADER_VERTEX:
crb.add(A6XX_SP_VS_OUTPUT_CNTL(.out = linkage.cnt)); crb.add(A6XX_SP_VS_OUTPUT_CNTL(.out = linkage.cnt));
@ -925,6 +922,9 @@ emit_vpc(fd_crb &crb, const struct program_builder *b)
)); ));
break; break;
case MESA_SHADER_GEOMETRY: case MESA_SHADER_GEOMETRY:
/* if vertex_flags somehow gets optimized out, your gonna have a bad time: */
assert(flags_regid != INVALID_REG);
crb.add(A6XX_SP_GS_OUTPUT_CNTL(.out = linkage.cnt, .flags_regid = flags_regid)); crb.add(A6XX_SP_GS_OUTPUT_CNTL(.out = linkage.cnt, .flags_regid = flags_regid));
crb.add(VPC_GS_SIV_CNTL(CHIP, crb.add(VPC_GS_SIV_CNTL(CHIP,
.layerloc = layer_loc, .layerloc = layer_loc,