From c430f394c5046249b4ed1e1b4bad5c0fe23962af Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Fri, 19 Dec 2025 14:23:31 -0800 Subject: [PATCH] freedreno/a6xx: Move assert The flags_regid is only present if gs is present (in which case, gs is the last_shader). If there is no gs, flags_regid is initialized to zero, not INVALID_REG (r63.x). But you have to scroll up several pages of a long fxn to see that. Move the assert to make things more clear. Signed-off-by: Rob Clark Part-of: --- src/gallium/drivers/freedreno/a6xx/fd6_program.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.cc b/src/gallium/drivers/freedreno/a6xx/fd6_program.cc index 711f4277384..a32d29fb40d 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_program.cc +++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.cc @@ -882,9 +882,6 @@ emit_vpc(fd_crb &crb, const struct program_builder *b) } } - /* if vertex_flags somehow gets optimized out, your gonna have a bad time: */ - assert(flags_regid != INVALID_REG); - switch (last_shader->type) { case MESA_SHADER_VERTEX: crb.add(A6XX_SP_VS_OUTPUT_CNTL(.out = linkage.cnt)); @@ -925,6 +922,9 @@ emit_vpc(fd_crb &crb, const struct program_builder *b) )); break; case MESA_SHADER_GEOMETRY: + /* if vertex_flags somehow gets optimized out, your gonna have a bad time: */ + assert(flags_regid != INVALID_REG); + crb.add(A6XX_SP_GS_OUTPUT_CNTL(.out = linkage.cnt, .flags_regid = flags_regid)); crb.add(VPC_GS_SIV_CNTL(CHIP, .layerloc = layer_loc,