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asahi: Fix CDM Launch/Barrier naming
"Launch" is actually just a barrier, and it seems likely to use the same bit assignments as in VDM... Signed-off-by: Asahi Lina <lina@asahilina.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26614>
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412922ed73
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c20210c643
3 changed files with 43 additions and 20 deletions
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@ -863,10 +863,10 @@
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<!-- CDM commands start -->
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<enum name="CDM Block Type">
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<value name="Header" value="0"/>
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<value name="Launch" value="0"/>
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<value name="Stream Link" value="1"/>
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<value name="Stream Terminate" value="2"/>
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<value name="Launch" value="3"/>
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<value name="Barrier" value="3"/>
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</enum>
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<enum name="CDM Mode">
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@ -884,13 +884,13 @@
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<value name="Indirect local" value="2"/>
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</enum>
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<struct name="CDM Header" size="8">
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<struct name="CDM Launch" size="8">
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<field name="Uniform register count" size="3" start="1" type="uint" modifier="groups(64)"/>
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<field name="Texture state register count" size="5" start="4" type="uint" modifier="groups(8)"/>
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<field name="Sampler state register count" size="3" start="9" type="Sampler states"/>
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<field name="Preshader register count" size="4" start="12" type="uint" modifier="groups(16)"/>
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<field name="Mode" size="2" start="27" type="CDM Mode"/>
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<field name="Block Type" size="3" start="29" type="CDM Block Type" default="Header"/>
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<field name="Block Type" size="3" start="29" type="CDM Block Type" default="Launch"/>
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<field name="Pipeline" size="26" start="1:6" type="address" modifier="shr(6)"/>
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</struct>
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@ -915,9 +915,29 @@
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<field name="Z" size="32" start="2:0" type="uint"/>
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</struct>
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<struct name="CDM Launch" size="4">
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<field name="Unknown" size="12" start="0" type="hex" default="0x160"/>
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<field name="Block Type" size="3" start="29" type="CDM Block Type" default="Launch"/>
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<struct name="CDM Barrier" size="4">
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<field name="USC cache inval" size="1" start="3" type="bool" default="false"/>
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<field name="Unk 4" size="1" start="4" type="bool" default="false"/>
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<field name="Unk 5" size="1" start="5" type="bool" default="false"/>
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<field name="Unk 6" size="1" start="6" type="bool" default="false"/>
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<field name="Unk 7" size="1" start="7" type="bool" default="false"/>
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<field name="Unk 8" size="1" start="8" type="bool" default="false"/>
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<field name="Unk 9" size="1" start="9" type="bool" default="false"/>
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<field name="Unk 10" size="1" start="10" type="bool" default="false"/>
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<field name="Unk 11" size="1" start="11" type="bool" default="false"/>
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<field name="Unk 12" size="1" start="12" type="bool" default="false"/>
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<field name="Unk 13" size="1" start="13" type="bool" default="false"/>
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<field name="Unk 14" size="1" start="14" type="bool" default="false"/>
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<field name="Unk 15" size="1" start="15" type="bool" default="false"/>
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<field name="Unk 16" size="1" start="16" type="bool" default="false"/>
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<field name="Unk 17" size="1" start="17" type="bool" default="false"/>
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<field name="Unk 18" size="1" start="18" type="bool" default="false"/>
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<field name="Unk 19" size="1" start="19" type="bool" default="false"/>
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<field name="Unk 20" size="1" start="20" type="bool" default="false"/>
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<field name="Unk 24" size="1" start="24" type="bool" default="false"/>
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<field name="Unk 26" size="1" start="26" type="bool" default="false"/>
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<field name="Returns" size="1" start="27" type="bool" default="false"/>
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<field name="Block Type" size="3" start="29" type="CDM Block Type" default="Barrier"/>
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</struct>
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<struct name="CDM Stream Link" size="8">
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@ -570,8 +570,8 @@ agxdecode_cdm(const uint8_t *map, uint64_t *link, bool verbose,
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enum agx_cdm_block_type block_type = (map[3] >> 5);
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switch (block_type) {
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case AGX_CDM_BLOCK_TYPE_HEADER: {
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size_t length = AGX_CDM_HEADER_LENGTH;
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case AGX_CDM_BLOCK_TYPE_LAUNCH: {
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size_t length = AGX_CDM_LAUNCH_LENGTH;
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#define CDM_PRINT(STRUCT_NAME, human) \
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do { \
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@ -580,11 +580,11 @@ agxdecode_cdm(const uint8_t *map, uint64_t *link, bool verbose,
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length += AGX_CDM_##STRUCT_NAME##_LENGTH; \
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} while (0);
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agx_unpack(agxdecode_dump_stream, map, CDM_HEADER, hdr);
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agx_unpack(agxdecode_dump_stream, map, CDM_LAUNCH, hdr);
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agxdecode_stateful(hdr.pipeline, "Pipeline", agxdecode_usc, verbose,
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params, &hdr.sampler_state_register_count);
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DUMP_UNPACKED(CDM_HEADER, hdr, "Compute\n");
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map += AGX_CDM_HEADER_LENGTH;
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DUMP_UNPACKED(CDM_LAUNCH, hdr, "Compute\n");
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map += AGX_CDM_LAUNCH_LENGTH;
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/* Added in G14X */
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if (params->gpu_generation >= 14 && params->num_clusters_total > 1)
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@ -622,9 +622,9 @@ agxdecode_cdm(const uint8_t *map, uint64_t *link, bool verbose,
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return STATE_DONE;
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}
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case AGX_CDM_BLOCK_TYPE_LAUNCH: {
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DUMP_CL(CDM_LAUNCH, map, "Launch");
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return AGX_CDM_LAUNCH_LENGTH;
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case AGX_CDM_BLOCK_TYPE_BARRIER: {
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DUMP_CL(CDM_BARRIER, map, "Barrier");
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return AGX_CDM_BARRIER_LENGTH;
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}
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default:
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@ -4053,7 +4053,7 @@ agx_launch(struct agx_batch *batch, const struct pipe_grid_info *info,
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/* TODO: Ensure space if we allow multiple kernels in a batch */
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uint8_t *out = batch->cdm.current;
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agx_pack(out, CDM_HEADER, cfg) {
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agx_pack(out, CDM_LAUNCH, cfg) {
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if (info->indirect)
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cfg.mode = AGX_CDM_MODE_INDIRECT_GLOBAL;
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else
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@ -4068,7 +4068,7 @@ agx_launch(struct agx_batch *batch, const struct pipe_grid_info *info,
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cfg.pipeline =
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agx_build_pipeline(batch, cs, stage, info->variable_shared_mem);
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}
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out += AGX_CDM_HEADER_LENGTH;
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out += AGX_CDM_LAUNCH_LENGTH;
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/* Added in G14X */
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if (dev->params.gpu_generation >= 14 && dev->params.num_clusters_total > 1) {
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@ -4100,9 +4100,12 @@ agx_launch(struct agx_batch *batch, const struct pipe_grid_info *info,
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}
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out += AGX_CDM_LOCAL_SIZE_LENGTH;
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agx_pack(out, CDM_LAUNCH, cfg)
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;
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out += AGX_CDM_LAUNCH_LENGTH;
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agx_pack(out, CDM_BARRIER, cfg) {
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cfg.unk_5 = true;
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cfg.unk_6 = true;
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cfg.unk_8 = true;
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}
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out += AGX_CDM_BARRIER_LENGTH;
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batch->cdm.current = out;
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assert(batch->cdm.current <= batch->cdm.end &&
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