From c1e1d86bd1c4d00b5ea797377a6fb96c305b6093 Mon Sep 17 00:00:00 2001 From: Natalie Vock Date: Tue, 25 Mar 2025 13:09:03 +0100 Subject: [PATCH] radv/rt: Flush CP writes from the common BVH framework with INV_L2 on GFX12 a1b05991 ("radv/rt: Flush L2 after writing internal node offset on GFX12") did this for radv-internal CP writes - we also need to do this for PLOC sync data initialization which is done in the common framework. Cc: mesa-stable Part-of: --- src/amd/vulkan/radv_acceleration_structure.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/amd/vulkan/radv_acceleration_structure.c b/src/amd/vulkan/radv_acceleration_structure.c index 8553148619d..71aa2cd8f19 100644 --- a/src/amd/vulkan/radv_acceleration_structure.c +++ b/src/amd/vulkan/radv_acceleration_structure.c @@ -673,6 +673,12 @@ radv_write_buffer_cp(VkCommandBuffer commandBuffer, VkDeviceAddress addr, void * static void radv_flush_buffer_write_cp(VkCommandBuffer commandBuffer) { + VK_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + const struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); + const struct radv_physical_device *pdev = radv_device_physical(device); + + if (pdev->info.cp_sdma_ge_use_system_memory_scope) + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_INV_L2; } static void