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virgl: don't allow vertex input arrays on GLES hosts

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v2: - use new HOST_IS_GLES flag (Corentin)
    - drop stray fprintf (Emma)
    - reorder cases to avoid code replication

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15550>
This commit is contained in:
Gert Wollny 2022-03-24 12:39:40 +01:00 • committed by Marge Bot
parent a2d40c09b7
commit bd93d6b2fb
1 changed files with 6 additions and 1 deletions
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7
src/gallium/drivers/virgl/virgl_screen.c
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@ -406,8 +406,13 @@ virgl_get_shader_param(struct pipe_screen *screen,
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
return 1;
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
if ((vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_HOST_IS_GLES) &&
(shader == PIPE_SHADER_VERTEX)) {
return 0;
}
FALLTHROUGH;
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_INPUT_ADDR;
case PIPE_SHADER_CAP_MAX_INPUTS:
if (vscreen->caps.caps.v1.glsl_level < 150)