From bd93d6b2fba4a9e78d12fc9c6cd2df4d2216dfbe Mon Sep 17 00:00:00 2001 From: Gert Wollny Date: Thu, 24 Mar 2022 12:39:40 +0100 Subject: [PATCH] virgl: don't allow vertex input arrays on GLES hosts v2: - use new HOST_IS_GLES flag (Corentin) - drop stray fprintf (Emma) - reorder cases to avoid code replication Signed-off-by: Gert Wollny Part-of: --- src/gallium/drivers/virgl/virgl_screen.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c index 77ea522f00e..34f860cc5c7 100644 --- a/src/gallium/drivers/virgl/virgl_screen.c +++ b/src/gallium/drivers/virgl/virgl_screen.c @@ -406,8 +406,13 @@ virgl_get_shader_param(struct pipe_screen *screen, case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: return 1; - case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: + if ((vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_HOST_IS_GLES) && + (shader == PIPE_SHADER_VERTEX)) { + return 0; + } + FALLTHROUGH; + case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_INPUT_ADDR; case PIPE_SHADER_CAP_MAX_INPUTS: if (vscreen->caps.caps.v1.glsl_level < 150)