nak/nir: Lower load_primitive_id

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24998>
This commit is contained in:
Faith Ekstrand 2023-09-30 02:29:06 -05:00 committed by Marge Bot
parent c2768736c9
commit bd90031b5b

View file

@ -273,6 +273,7 @@ static uint16_t
nak_sysval_attr_addr(gl_system_value sysval)
{
switch (sysval) {
case SYSTEM_VALUE_PRIMITIVE_ID: return NAK_ATTR_PRIMITIVE_ID;
case SYSTEM_VALUE_FRAG_COORD: return NAK_ATTR_POSITION;
case SYSTEM_VALUE_POINT_COORD: return NAK_ATTR_POINT_SPRITE;
case SYSTEM_VALUE_TESS_COORD: return NAK_ATTR_TESS_COORD;
@ -303,6 +304,18 @@ nak_sysval_sysval_idx(gl_system_value sysval)
}
}
static nir_def *
nak_nir_isberd(nir_builder *b, nir_def *vertex)
{
nir_def *info = nir_load_sysval_nv(b, 32, .base = NAK_SV_INVOCATION_INFO,
.access = ACCESS_CAN_REORDER);
nir_def *lo = nir_extract_u8_imm(b, info, 0);
nir_def *hi = nir_extract_u8_imm(b, info, 2);
nir_def *idx = nir_iadd(b, nir_imul(b, lo, hi), vertex);
return nir_isberd_nv(b, idx);
}
static bool
lower_per_vertex_io_intrin(nir_builder *b,
nir_intrinsic_instr *intrin,
@ -314,13 +327,7 @@ lower_per_vertex_io_intrin(nir_builder *b,
b->cursor = nir_before_instr(&intrin->instr);
nir_src *vertex = &intrin->src[0];
nir_def *info = nir_load_sysval_nv(b, 32, .base = NAK_SV_INVOCATION_INFO,
.access = ACCESS_CAN_REORDER);
nir_def *lo = nir_extract_u8_imm(b, info, 0);
nir_def *hi = nir_extract_u8_imm(b, info, 2);
nir_def *idx = nir_iadd(b, nir_imul(b, lo, hi), vertex->ssa);
idx = nir_isberd_nv(b, idx);
nir_def *idx = nak_nir_isberd(b, vertex->ssa);
nir_src_rewrite(vertex, idx);
return true;
@ -594,6 +601,16 @@ nak_nir_lower_system_value_instr(nir_builder *b, nir_instr *instr, void *data)
break;
}
case nir_intrinsic_load_primitive_id: {
assert(b->shader->info.stage == MESA_SHADER_TESS_CTRL ||
b->shader->info.stage == MESA_SHADER_TESS_EVAL);
nir_def *idx = nak_nir_isberd(b, nir_imm_int(b, 0));
val = nir_load_per_vertex_input(b, 1, 32, idx, nir_imm_int(b, 0),
.base = NAK_ATTR_PRIMITIVE_ID,
.dest_type = nir_type_int32);
break;
}
case nir_intrinsic_load_front_face:
case nir_intrinsic_load_tess_coord:
case nir_intrinsic_load_instance_id: