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i965: Drop the system-memory temporary allocations for flush explicit.
While in expected usage patterns nobody will ever hit this path, doubling our bandwidth used seems like a waste, and it cost us extra code too. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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parent
ea93246c00
commit
bb63df0c2d
2 changed files with 58 additions and 52 deletions
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@ -409,27 +409,21 @@ intel_bufferobj_map_range(struct gl_context * ctx,
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* guarantees the driver has advertised to the application.
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*/
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const unsigned alignment = ctx->Const.MinMapBufferAlignment;
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const unsigned extra = (uintptr_t) offset % alignment;
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if (access & GL_MAP_FLUSH_EXPLICIT_BIT) {
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intel_obj->range_map_buffer[index] = _mesa_align_malloc(length + extra,
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alignment);
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obj->Mappings[index].Pointer =
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intel_obj->range_map_buffer[index] + extra;
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intel_obj->map_extra[index] = (uintptr_t) offset % alignment;
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intel_obj->range_map_bo[index] = drm_intel_bo_alloc(brw->bufmgr,
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"BO blit temp",
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length +
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intel_obj->map_extra[index],
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alignment);
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if (brw->has_llc) {
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drm_intel_bo_map(intel_obj->range_map_bo[index],
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(access & GL_MAP_WRITE_BIT) != 0);
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} else {
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intel_obj->range_map_bo[index] = drm_intel_bo_alloc(brw->bufmgr,
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"range map",
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length + extra,
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alignment);
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if (brw->has_llc) {
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drm_intel_bo_map(intel_obj->range_map_bo[index],
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(access & GL_MAP_WRITE_BIT) != 0);
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} else {
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drm_intel_gem_bo_map_gtt(intel_obj->range_map_bo[index]);
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}
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obj->Mappings[index].Pointer =
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intel_obj->range_map_bo[index]->virtual + extra;
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drm_intel_gem_bo_map_gtt(intel_obj->range_map_bo[index]);
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}
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obj->Mappings[index].Pointer =
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intel_obj->range_map_bo[index]->virtual + intel_obj->map_extra[index];
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return obj->Mappings[index].Pointer;
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}
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@ -468,35 +462,51 @@ intel_bufferobj_flush_mapped_range(struct gl_context *ctx,
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{
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struct brw_context *brw = brw_context(ctx);
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struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
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drm_intel_bo *temp_bo;
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GLbitfield access = obj->Mappings[index].AccessFlags;
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/* Unless we're in the range map using a temporary system buffer,
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* there's no work to do.
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assert(access & GL_MAP_FLUSH_EXPLICIT_BIT);
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/* If we gave a direct mapping of the buffer instead of using a temporary,
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* then there's nothing to do.
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*/
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if (intel_obj->range_map_buffer[index] == NULL)
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if (intel_obj->range_map_bo[index] == NULL)
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return;
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if (length == 0)
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return;
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temp_bo = drm_intel_bo_alloc(brw->bufmgr, "range map flush", length, 64);
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/* Use obj->Pointer instead of intel_obj->range_map_buffer because the
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* former points to the actual mapping while the latter may be offset to
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* meet alignment guarantees.
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/* Note that we're not unmapping our buffer while executing the blit. We
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* need to have a mapping still at the end of this call, since the user
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* gets to make further modifications and glFlushMappedBufferRange() calls.
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* This is safe, because:
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*
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* - On LLC platforms, we're using a CPU mapping that's coherent with the
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* GPU (except for the render caches), so the kernel doesn't need to do
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* any flushing work for us except for what happens at batch exec time
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* anyway.
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*
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* - On non-LLC platforms, we're using a GTT mapping that writes directly
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* to system memory (except for the chipset cache that gets flushed at
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* batch exec time).
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*
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* In both cases we don't need to stall for the previous blit to complete
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* so we can re-map (and we definitely don't want to, since that would be
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* slow): If the user edits a part of their buffer that's previously been
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* blitted, then our lack of synchoronization is fine, because either
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* they'll get some too-new data in the first blit and not do another blit
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* of that area (but in that case the results are undefined), or they'll do
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* another blit of that area and the complete newer data will land the
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* second time.
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*/
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drm_intel_bo_subdata(temp_bo, 0, length, obj->Mappings[index].Pointer);
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intel_emit_linear_blit(brw,
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intel_obj->buffer,
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obj->Mappings[index].Offset + offset,
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temp_bo, 0,
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intel_obj->range_map_bo[index],
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intel_obj->map_extra[index] + offset,
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length);
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intel_bufferobj_mark_gpu_usage(intel_obj,
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obj->Mappings[index].Offset + offset,
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length);
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drm_intel_bo_unreference(temp_bo);
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}
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@ -514,27 +524,18 @@ intel_bufferobj_unmap(struct gl_context * ctx, struct gl_buffer_object *obj,
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assert(intel_obj);
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assert(obj->Mappings[index].Pointer);
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if (intel_obj->range_map_buffer[index] != NULL) {
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/* Since we've emitted some blits to buffers that will (likely) be used
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* in rendering operations in other cache domains in this batch, emit a
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* flush. Once again, we wish for a domain tracker in libdrm to cover
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* usage inside of a batchbuffer.
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*/
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intel_batchbuffer_emit_mi_flush(brw);
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_mesa_align_free(intel_obj->range_map_buffer[index]);
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intel_obj->range_map_buffer[index] = NULL;
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} else if (intel_obj->range_map_bo[index] != NULL) {
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const unsigned extra = obj->Mappings[index].Pointer -
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intel_obj->range_map_bo[index]->virtual;
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if (intel_obj->range_map_bo[index] != NULL) {
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drm_intel_bo_unmap(intel_obj->range_map_bo[index]);
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intel_emit_linear_blit(brw,
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intel_obj->buffer, obj->Mappings[index].Offset,
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intel_obj->range_map_bo[index], extra,
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obj->Mappings[index].Length);
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intel_bufferobj_mark_gpu_usage(intel_obj, obj->Mappings[index].Offset,
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obj->Mappings[index].Length);
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if (!(obj->Mappings[index].AccessFlags & GL_MAP_FLUSH_EXPLICIT_BIT)) {
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intel_emit_linear_blit(brw,
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intel_obj->buffer, obj->Mappings[index].Offset,
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intel_obj->range_map_bo[index],
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intel_obj->map_extra[index],
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obj->Mappings[index].Length);
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intel_bufferobj_mark_gpu_usage(intel_obj, obj->Mappings[index].Offset,
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obj->Mappings[index].Length);
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}
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/* Since we've emitted some blits to buffers that will (likely) be used
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* in rendering operations in other cache domains in this batch, emit a
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@ -43,7 +43,12 @@ struct intel_buffer_object
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drm_intel_bo *buffer; /* the low-level buffer manager's buffer handle */
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drm_intel_bo *range_map_bo[MAP_COUNT];
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void *range_map_buffer[MAP_COUNT];
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/**
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* Alignment offset from the range_map_bo temporary mapping to the returned
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* obj->Pointer (caused by GL_ARB_map_buffer_alignment).
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*/
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unsigned map_extra[MAP_COUNT];
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/** @{
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* Tracking for what range of the BO may currently be in use by the GPU.
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