fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-01-13 09:50:17 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

radeonsi: Use ALIGN_POT instead ALIGN_TO

Browse source 
ALIGN_POT would be a bit faster as it's have no divide arithmetic

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23987>
This commit is contained in:
Yonggang Luo 2023-07-04 16:47:45 +08:00 • committed by Marge Bot
parent 4880c827d6
commit ba83c1e254
2 changed files with 7 additions and 7 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

10
src/gallium/drivers/radeonsi/radeon_vcn_enc.c
View file

@ -719,10 +719,10 @@ static int setup_dpb(struct radeon_encoder *enc)
offset = 0;
if (enc_pic->quality_modes.pre_encode_mode) {
uint32_t pre_size = ALIGN_TO((aligned_width >> 2), rec_alignment) *
ALIGN_TO((aligned_height >> 2), rec_alignment);
uint32_t full_size = ALIGN_TO(aligned_width, rec_alignment) *
ALIGN_TO(aligned_height, rec_alignment);
uint32_t pre_size = ALIGN_POT((aligned_width >> 2), rec_alignment) *
ALIGN_POT((aligned_height >> 2), rec_alignment);
uint32_t full_size = ALIGN_POT(aligned_width, rec_alignment) *
ALIGN_POT(aligned_height, rec_alignment);
pre_size = align(pre_size, 4);
full_size = align(full_size, 4);
@ -1168,7 +1168,7 @@ static void radeon_enc_av1_bs_copy_end(struct radeon_encoder *enc, uint32_t bits
{
assert(bits > 0);
/* it must be dword aligned at the end */
*enc->enc_pic.copy_start = ALIGN_TO(bits, 32) * 4 + 12;
*enc->enc_pic.copy_start = ALIGN_POT(bits, 32) * 4 + 12;
*(enc->enc_pic.copy_start + 2) = bits;
}

4
src/gallium/drivers/radeonsi/radeon_vcn_enc.h
View file

@ -10,6 +10,7 @@
#define _RADEON_VCN_ENC_H
#include "radeon_vcn.h"
#include "util/macros.h"
#define RENCODE_IB_OP_INITIALIZE 0x01000001
#define RENCODE_IB_OP_CLOSE_SESSION 0x01000002
@ -176,8 +177,7 @@
#define RENCODE_COLOR_SPACE_YUV 0
#define ALIGN_TO(value, align) (((value) + ((align) - 1))/(align))
#define PIPE_ALIGN_IN_BLOCK_SIZE(value, align) ALIGN_TO(value, align)
#define PIPE_ALIGN_IN_BLOCK_SIZE(value, alignment) ALIGN_POT(value, alignment)
#define RADEON_ENC_CS(value) (enc->cs.current.buf[enc->cs.current.cdw++] = (value))
#define RADEON_ENC_BEGIN(cmd) \