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radeonsi: pass radeon_cmdbuf to si_cp_dma_wait_for_idle
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8002>
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3 changed files with 4 additions and 4 deletions
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@ -132,7 +132,7 @@ static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, ui
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}
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}
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void si_cp_dma_wait_for_idle(struct si_context *sctx)
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void si_cp_dma_wait_for_idle(struct si_context *sctx, struct radeon_cmdbuf *cs)
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{
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/* Issue a dummy DMA that copies zero bytes.
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*
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@ -140,7 +140,7 @@ void si_cp_dma_wait_for_idle(struct si_context *sctx)
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* DMA request, however, the CP will see the sync flag and still wait
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* for all DMAs to complete.
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*/
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si_emit_cp_dma(sctx, &sctx->gfx_cs, 0, 0, 0, CP_DMA_SYNC, L2_BYPASS);
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si_emit_cp_dma(sctx, cs, 0, 0, 0, CP_DMA_SYNC, L2_BYPASS);
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}
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static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst,
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@ -141,7 +141,7 @@ void si_flush_gfx_cs(struct si_context *ctx, unsigned flags, struct pipe_fence_h
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/* Make sure CP DMA is idle at the end of IBs after L2 prefetches
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* because the kernel doesn't wait for it. */
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if (ctx->chip_class >= GFX7)
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si_cp_dma_wait_for_idle(ctx);
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si_cp_dma_wait_for_idle(ctx, &ctx->gfx_cs);
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/* Wait for draw calls to finish if needed. */
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if (wait_flags) {
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@ -1385,7 +1385,7 @@ void si_init_compute_blit_functions(struct si_context *sctx);
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(SI_CPDMA_SKIP_CHECK_CS_SPACE | SI_CPDMA_SKIP_SYNC_AFTER | SI_CPDMA_SKIP_SYNC_BEFORE | \
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SI_CPDMA_SKIP_GFX_SYNC | SI_CPDMA_SKIP_BO_LIST_UPDATE | SI_CPDMA_SKIP_TMZ)
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void si_cp_dma_wait_for_idle(struct si_context *sctx);
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void si_cp_dma_wait_for_idle(struct si_context *sctx, struct radeon_cmdbuf *cs);
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void si_cp_dma_clear_buffer(struct si_context *sctx, struct radeon_cmdbuf *cs,
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struct pipe_resource *dst, uint64_t offset, uint64_t size,
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unsigned value, unsigned user_flags, enum si_coherency coher,
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