mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
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nv40: remove use of temps for KILP, implement KIL
This commit is contained in:
Ben Skeggs
parent
060127af38
commit
b4c813313a
3 changed files with 100 additions and 75 deletions
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@ -58,13 +58,13 @@ struct nv40_fpc {
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};
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static INLINE struct nv40_sreg
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nv40_sr_temp(struct nv40_fpc *fpc)
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temp(struct nv40_fpc *fpc)
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{
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int idx;
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idx = fpc->temp_temp_count++;
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idx += fpc->high_temp + 1;
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return nv40_sr(0, NV40_FP_REG_TYPE_TEMP, idx);
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return nv40_sr(NV40SR_TEMP, idx);
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}
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#define arith(cc,s,o,d,m,s0,s1,s2) \
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@ -73,22 +73,30 @@ nv40_sr_temp(struct nv40_fpc *fpc)
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#define tex(cc,s,o,u,d,m,s0,s1,s2) \
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nv40_fp_tex((cc), (s), NV40_FP_OP_OPCODE_##o, (u), \
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(d), (m), (s0), none, none)
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#define temp(fpc) nv40_sr_temp((fpc))
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static void
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emit_src(struct nv40_fpc *fpc, uint32_t *hw, int pos, struct nv40_sreg src)
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{
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uint32_t sr = 0;
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sr |= (src.type << NV40_FP_REG_TYPE_SHIFT);
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if (src.type == NV40_FP_REG_TYPE_INPUT) {
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switch (src.type) {
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case NV40SR_INPUT:
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sr |= (NV40_FP_REG_TYPE_INPUT << NV40_FP_REG_TYPE_SHIFT);
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hw[0] |= (src.index << NV40_FP_OP_INPUT_SRC_SHIFT);
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} else
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if (src.type == NV40_FP_REG_TYPE_CONST) {
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fpc->inst_has_const = TRUE;
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} else
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if (src.type == NV40_FP_REG_TYPE_TEMP) {
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break;
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case NV40SR_TEMP:
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sr |= (NV40_FP_REG_TYPE_TEMP << NV40_FP_REG_TYPE_SHIFT);
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sr |= (src.index << NV40_FP_REG_SRC_SHIFT);
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break;
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case NV40SR_CONST:
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sr |= (NV40_FP_REG_TYPE_CONST << NV40_FP_REG_TYPE_SHIFT);
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fpc->inst_has_const = TRUE;
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break;
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case NV40SR_NONE:
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sr |= (NV40_FP_REG_TYPE_INPUT << NV40_FP_REG_TYPE_SHIFT);
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break;
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default:
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assert(0);
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}
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if (src.negate)
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@ -110,16 +118,25 @@ emit_dst(struct nv40_fpc *fpc, uint32_t *hw, struct nv40_sreg dst)
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{
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struct nv40_fragment_program *fp = fpc->fp;
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if (dst.output) {
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switch (dst.type) {
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case NV40SR_TEMP:
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if (fp->num_regs < (dst.index + 1))
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fp->num_regs = dst.index + 1;
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break;
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case NV40SR_OUTPUT:
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if (dst.index == 1) {
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fp->writes_depth = 1;
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} else {
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hw[0] |= NV40_FP_OP_UNK0_7;
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}
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} else {
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if (fp->num_regs < (dst.index + 1))
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fp->num_regs = dst.index + 1;
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break;
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case NV40SR_NONE:
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hw[0] |= (1 << 30);
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break;
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default:
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assert(0);
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}
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hw[0] |= (dst.index << NV40_FP_OP_OUT_REG_SHIFT);
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}
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@ -180,29 +197,25 @@ static INLINE struct nv40_sreg
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tgsi_src(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc)
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{
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struct nv40_sreg src;
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uint type, index;
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switch (fsrc->SrcRegister.File) {
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case TGSI_FILE_INPUT:
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type = NV40_FP_REG_TYPE_INPUT;
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index = fpc->attrib_map[fsrc->SrcRegister.Index];
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src = nv40_sr(NV40SR_INPUT,
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fpc->attrib_map[fsrc->SrcRegister.Index]);
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break;
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case TGSI_FILE_CONSTANT:
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type = NV40_FP_REG_TYPE_CONST;
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index = fsrc->SrcRegister.Index;
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src = nv40_sr(NV40SR_CONST, fsrc->SrcRegister.Index);
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break;
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case TGSI_FILE_TEMPORARY:
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type = NV40_FP_REG_TYPE_TEMP;
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index = fsrc->SrcRegister.Index + 1;
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if (fpc->high_temp < index)
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fpc->high_temp = index;
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src = nv40_sr(NV40SR_TEMP, fsrc->SrcRegister.Index + 1);
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if (fpc->high_temp < src.index)
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fpc->high_temp = src.index;
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break;
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default:
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NOUVEAU_ERR("bad src file\n");
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break;
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}
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src = nv40_sr(0, type, index);
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src.abs = fsrc->SrcRegisterExtMod.Absolute;
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src.negate = fsrc->SrcRegister.Negate;
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src.swz[0] = fsrc->SrcRegister.SwizzleX;
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@ -214,30 +227,26 @@ tgsi_src(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc)
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static INLINE struct nv40_sreg
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tgsi_dst(struct nv40_fpc *fpc, const struct tgsi_full_dst_register *fdst) {
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int out, idx;
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int idx;
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switch (fdst->DstRegister.File) {
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case TGSI_FILE_OUTPUT:
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out = 1;
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if (fdst->DstRegister.Index == fpc->colour_id)
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idx = 0;
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return nv40_sr(NV40SR_OUTPUT, 0);
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else
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idx = 1;
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return nv40_sr(NV40SR_OUTPUT, 1);
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break;
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case TGSI_FILE_TEMPORARY:
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out = 0;
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idx = fdst->DstRegister.Index + 1;
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if (fpc->high_temp < idx)
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fpc->high_temp = idx;
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break;
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return nv40_sr(NV40SR_TEMP, idx);
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case TGSI_FILE_NULL:
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break;
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return nv40_sr(NV40SR_NONE, 0);
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default:
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NOUVEAU_ERR("bad dst file %d\n", fdst->DstRegister.File);
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break;
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return nv40_sr(NV40SR_NONE, 0);
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}
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return nv40_sr(out, NV40_FP_REG_TYPE_TEMP, idx);
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}
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static INLINE int
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@ -256,8 +265,8 @@ static boolean
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nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
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const struct tgsi_full_instruction *finst)
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{
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const struct nv40_sreg none = nv40_sr(NV40SR_NONE, 0);
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struct nv40_sreg src[3], dst, tmp;
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struct nv40_sreg none = nv40_sr(0, NV40_FP_REG_TYPE_INPUT, 0);
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int mask, sat, unit;
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int ai = -1, ci = -1;
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int i;
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@ -361,14 +370,13 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
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arith(fpc, sat, FRC, dst, mask, src[0], none, none);
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break;
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case TGSI_OPCODE_KIL:
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arith(fpc, 0, KIL, none, 0, none, none, none);
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break;
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case TGSI_OPCODE_KILP:
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/*XXX: Which is NV, which is ARB kil? ARB implemented here.
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*XXX: Don't need temp, can update CC0 without writing dst
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*/
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tmp = temp(fpc);
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tmp.cc_update = 1;
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arith(fpc, 0, MOV, tmp, MASK_ALL, src[0], none, none);
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dst.cc_test = NV40_FP_OP_COND_LT;
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dst = nv40_sr(NV40SR_NONE, 0);
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dst.cc_update = 1;
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arith(fpc, 0, MOV, dst, MASK_ALL, src[0], none, none);
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dst.cc_update = 0; dst.cc_test = NV40_FP_OP_COND_LT;
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arith(fpc, 0, KIL, dst, 0, none, none, none);
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break;
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case TGSI_OPCODE_LG2:
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@ -472,8 +472,13 @@
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# define NV40_FP_SWIZZLE_W 3
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#define NV40_FP_REG_NEGATE (1 << 17)
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#define NV40SR_NONE 0
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#define NV40SR_OUTPUT 1
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#define NV40SR_INPUT 2
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#define NV40SR_TEMP 3
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#define NV40SR_CONST 4
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struct nv40_sreg {
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int output;
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int type;
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int index;
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@ -491,10 +496,9 @@ struct nv40_sreg {
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};
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static INLINE struct nv40_sreg
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nv40_sr(int out, int type, int index)
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nv40_sr(int type, int index)
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{
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struct nv40_sreg temp = {
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.output = out,
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.type = type,
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.index = index,
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.dst_scale = DEF_SCALE,
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@ -54,18 +54,17 @@ struct nv40_vpc {
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};
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static INLINE struct nv40_sreg
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nv40_sr_temp(struct nv40_vpc *vpc)
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temp(struct nv40_vpc *vpc)
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{
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int idx;
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idx = vpc->temp_temp_count++;
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idx += vpc->high_temp;
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return nv40_sr(0, NV40_VP_SRC_REG_TYPE_TEMP, idx);
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return nv40_sr(NV40SR_TEMP, idx);
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}
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static INLINE struct nv40_sreg
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nv40_sr_const(struct nv40_vpc *vpc, int pipe,
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float x, float y, float z, float w)
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constant(struct nv40_vpc *vpc, int pipe, float x, float y, float z, float w)
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{
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struct nv40_vertex_program *vp = vpc->vp;
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int idx = vp->num_consts;
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@ -78,13 +77,11 @@ nv40_sr_const(struct nv40_vpc *vpc, int pipe,
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vp->consts[idx].value[3] = w;
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vp->num_consts++;
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return nv40_sr(0, NV40_VP_SRC_REG_TYPE_CONST, idx);
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return nv40_sr(NV40SR_CONST, idx);
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}
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#define arith(cc,s,o,d,m,s0,s1,s2) \
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nv40_vp_arith((cc), (s), NV40_VP_INST_##o, (d), (m), (s0), (s1), (s2))
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#define temp(vpc) nv40_sr_temp((vpc))
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#define constant(v,p,x,y,z,w) nv40_sr_const((v), (p), (x), (y), (z), (w))
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static void
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emit_src(struct nv40_vpc *vpc, uint32_t *hw, int pos, struct nv40_sreg src)
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@ -92,15 +89,28 @@ emit_src(struct nv40_vpc *vpc, uint32_t *hw, int pos, struct nv40_sreg src)
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struct nv40_vertex_program *vp = vpc->vp;
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uint32_t sr = 0;
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sr |= (src.type << NV40_VP_SRC_REG_TYPE_SHIFT);
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if (src.type == NV40_VP_SRC_REG_TYPE_INPUT) {
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switch (src.type) {
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case NV40SR_TEMP:
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sr |= (NV40_VP_SRC_REG_TYPE_TEMP << NV40_VP_SRC_REG_TYPE_SHIFT);
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sr |= (src.index << NV40_VP_SRC_TEMP_SRC_SHIFT);
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break;
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case NV40SR_INPUT:
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sr |= (NV40_VP_SRC_REG_TYPE_INPUT <<
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NV40_VP_SRC_REG_TYPE_SHIFT);
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vp->ir |= (1 << src.index);
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hw[1] |= (src.index << NV40_VP_INST_INPUT_SRC_SHIFT);
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} else
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if (src.type == NV40_VP_SRC_REG_TYPE_CONST) {
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break;
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case NV40SR_CONST:
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sr |= (NV40_VP_SRC_REG_TYPE_CONST <<
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NV40_VP_SRC_REG_TYPE_SHIFT);
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hw[1] |= (src.index << NV40_VP_INST_CONST_SRC_SHIFT);
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} else {
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sr |= (src.index << NV40_VP_SRC_TEMP_SRC_SHIFT);
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break;
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case NV40SR_NONE:
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sr |= (NV40_VP_SRC_REG_TYPE_INPUT <<
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NV40_VP_SRC_REG_TYPE_SHIFT);
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break;
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default:
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assert(0);
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}
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if (src.negate)
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@ -140,16 +150,18 @@ emit_dst(struct nv40_vpc *vpc, uint32_t *hw, int slot, struct nv40_sreg dst)
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{
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struct nv40_vertex_program *vp = vpc->vp;
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if (dst.output == 0) {
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switch (dst.type) {
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case NV40SR_TEMP:
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hw[3] |= NV40_VP_INST_DEST_MASK;
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if (slot == 0) {
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hw[0] |= (dst.index <<
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NV40_VP_INST_VEC_DEST_TEMP_SHIFT);
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} else {
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hw[3] |= (dst.index <<
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hw[3] |= (dst.index <<
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NV40_VP_INST_SCA_DEST_TEMP_SHIFT);
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}
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} else {
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break;
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case NV40SR_OUTPUT:
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switch (dst.index) {
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case NV40_VP_INST_DEST_COL0 : vp->or |= (1 << 0); break;
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case NV40_VP_INST_DEST_COL1 : vp->or |= (1 << 1); break;
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@ -166,7 +178,7 @@ emit_dst(struct nv40_vpc *vpc, uint32_t *hw, int slot, struct nv40_sreg dst)
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case NV40_VP_INST_DEST_TC(6): vp->or |= (1 << 20); break;
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case NV40_VP_INST_DEST_TC(7): vp->or |= (1 << 21); break;
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default:
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break;
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break;
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}
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hw[3] |= (dst.index << NV40_VP_INST_DEST_SHIFT);
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@ -177,6 +189,9 @@ emit_dst(struct nv40_vpc *vpc, uint32_t *hw, int slot, struct nv40_sreg dst)
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hw[3] |= NV40_VP_INST_SCA_RESULT;
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hw[3] |= NV40_VP_INST_SCA_DEST_TEMP_MASK;
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}
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break;
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default:
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assert(0);
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}
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}
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@ -220,8 +235,7 @@ tgsi_src(struct nv40_vpc *vpc, const struct tgsi_full_src_register *fsrc) {
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switch (fsrc->SrcRegister.File) {
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case TGSI_FILE_INPUT:
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src = nv40_sr(0, NV40_VP_SRC_REG_TYPE_INPUT,
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fsrc->SrcRegister.Index);
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src = nv40_sr(NV40SR_INPUT, fsrc->SrcRegister.Index);
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break;
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case TGSI_FILE_CONSTANT:
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src = constant(vpc, fsrc->SrcRegister.Index, 0, 0, 0, 0);
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@ -229,8 +243,7 @@ tgsi_src(struct nv40_vpc *vpc, const struct tgsi_full_src_register *fsrc) {
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case TGSI_FILE_TEMPORARY:
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if (vpc->high_temp < fsrc->SrcRegister.Index)
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vpc->high_temp = fsrc->SrcRegister.Index;
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src = nv40_sr(0, NV40_VP_SRC_REG_TYPE_TEMP,
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fsrc->SrcRegister.Index);
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src = nv40_sr(NV40SR_TEMP, fsrc->SrcRegister.Index);
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break;
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default:
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NOUVEAU_ERR("bad src file\n");
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@ -248,25 +261,25 @@ tgsi_src(struct nv40_vpc *vpc, const struct tgsi_full_src_register *fsrc) {
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static INLINE struct nv40_sreg
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tgsi_dst(struct nv40_vpc *vpc, const struct tgsi_full_dst_register *fdst) {
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uint out, idx;
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struct nv40_sreg dst;
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switch (fdst->DstRegister.File) {
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case TGSI_FILE_OUTPUT:
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out = 1;
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idx = vpc->output_map[fdst->DstRegister.Index];
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dst = nv40_sr(NV40SR_OUTPUT,
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vpc->output_map[fdst->DstRegister.Index]);
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break;
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case TGSI_FILE_TEMPORARY:
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out = 0;
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idx = fdst->DstRegister.Index;
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if (vpc->high_temp < idx)
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vpc->high_temp = idx;
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dst = nv40_sr(NV40SR_TEMP, fdst->DstRegister.Index);
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if (vpc->high_temp < dst.index)
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vpc->high_temp = dst.index;
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break;
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default:
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NOUVEAU_ERR("bad dst file\n");
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break;
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}
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return nv40_sr(out, NV40_VP_SRC_REG_TYPE_TEMP, idx);
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return dst;
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}
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static INLINE int
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@ -286,7 +299,7 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,
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const struct tgsi_full_instruction *finst)
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{
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struct nv40_sreg src[3], dst, tmp;
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struct nv40_sreg none = nv40_sr(0, NV40_VP_SRC_REG_TYPE_INPUT, 0);
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struct nv40_sreg none = nv40_sr(NV40SR_NONE, 0);
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int mask;
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int ai = -1, ci = -1;
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int i;
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