fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-07 04:58:05 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 4

gallium/radeon: fix incorrect bpe use in si_set_optimal_micro_tile_mode

Browse source 
Oh my god, I wonder what catastrophic issues this was causing on SI.

Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 8a21f52d73)
This commit is contained in:
Marek Olšák 2016-10-23 15:29:18 +02:00 • committed by Emil Velikov
parent fbfc01e654
commit b214af38b9
1 changed files with 7 additions and 7 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

14
src/gallium/drivers/radeon/r600_texture.c
View file

@ -2442,29 +2442,29 @@ static void si_set_optimal_micro_tile_mode(struct r600_common_screen *rscreen,
switch (rtex->last_msaa_resolve_target_micro_mode) {
case 0: /* displayable */
switch (rtex->surface.bpe) {
case 8:
case 1:
rtex->surface.tiling_index[0] = 10;
break;
case 16:
case 2:
rtex->surface.tiling_index[0] = 11;
break;
default: /* 32, 64 */
default: /* 4, 8 */
rtex->surface.tiling_index[0] = 12;
break;
}
break;
case 1: /* thin */
switch (rtex->surface.bpe) {
case 8:
case 1:
rtex->surface.tiling_index[0] = 14;
break;
case 16:
case 2:
rtex->surface.tiling_index[0] = 15;
break;
case 32:
case 4:
rtex->surface.tiling_index[0] = 16;
break;
default: /* 64, 128 */
default: /* 8, 16 */
rtex->surface.tiling_index[0] = 17;
break;
}