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intel/brw: Indent conditional block from brw_compile_fs() not applicable to Xe2+.

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Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32664>
This commit is contained in:
Francisco Jerez 2024-09-18 14:37:32 -07:00 • committed by Marge Bot
parent d7d08ec2e2
commit afff3eb95e
1 changed files with 7 additions and 7 deletions
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14
src/intel/compiler/brw_compile_fs.cpp
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@ -1610,15 +1610,15 @@ brw_compile_fs(const struct brw_compiler *compiler,
has_spilled = v8->spilled_any_registers;
allow_spilling = false;
}
}
if (key->coarse_pixel && devinfo->ver < 20) {
if (prog_data->dual_src_blend) {
v8->limit_dispatch_width(8, "SIMD16 coarse pixel shading cannot"
" use SIMD8 messages.\n");
if (key->coarse_pixel) {
if (prog_data->dual_src_blend) {
v8->limit_dispatch_width(8, "SIMD16 coarse pixel shading cannot"
" use SIMD8 messages.\n");
}
v8->limit_dispatch_width(16, "SIMD32 not supported with coarse"
" pixel shading.\n");
}
v8->limit_dispatch_width(16, "SIMD32 not supported with coarse"
" pixel shading.\n");
}
if (devinfo->ver >= 30) {