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intel/brw: Indent body of brw_compile_fs() not applicable to xe3+.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32664>
This commit is contained in:
Francisco Jerez
Marge Bot
parent
d03eac3133
commit
d7d08ec2e2
1 changed files with 129 additions and 126 deletions
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@ -1621,141 +1621,144 @@ brw_compile_fs(const struct brw_compiler *compiler,
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" pixel shading.\n");
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}
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if ((!has_spilled && (!v8 || v8->max_dispatch_width >= 16) &&
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INTEL_SIMD(FS, 16)) ||
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reqd_dispatch_width == SUBGROUP_SIZE_REQUIRE_16) {
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/* Try a SIMD16 compile */
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v16 = std::make_unique<fs_visitor>(compiler, ¶ms->base, key,
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prog_data, nir, 16, 1,
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params->base.stats != NULL,
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debug_enabled);
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if (v8)
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v16->import_uniforms(v8.get());
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if (!run_fs(*v16, allow_spilling, params->use_rep_send)) {
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brw_shader_perf_log(compiler, params->base.log_data,
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"SIMD16 shader failed to compile: %s\n",
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v16->fail_msg);
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} else {
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simd16_cfg = v16->cfg;
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assert(v16->payload().num_regs % reg_unit(devinfo) == 0);
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prog_data->dispatch_grf_start_reg_16 = v16->payload().num_regs / reg_unit(devinfo);
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const performance &perf = v16->performance_analysis.require();
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throughput = MAX2(throughput, perf.throughput);
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has_spilled = v16->spilled_any_registers;
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allow_spilling = false;
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}
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}
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const bool simd16_failed = v16 && !simd16_cfg;
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/* Currently, the compiler only supports SIMD32 on SNB+ */
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if (!has_spilled &&
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(!v8 || v8->max_dispatch_width >= 32) &&
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(!v16 || v16->max_dispatch_width >= 32) &&
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reqd_dispatch_width == SUBGROUP_SIZE_VARYING &&
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!simd16_failed && INTEL_SIMD(FS, 32)) {
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/* Try a SIMD32 compile */
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v32 = std::make_unique<fs_visitor>(compiler, ¶ms->base, key,
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prog_data, nir, 32, 1,
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params->base.stats != NULL,
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debug_enabled);
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if (v8)
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v32->import_uniforms(v8.get());
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else if (v16)
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v32->import_uniforms(v16.get());
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if (!run_fs(*v32, allow_spilling, false)) {
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brw_shader_perf_log(compiler, params->base.log_data,
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"SIMD32 shader failed to compile: %s\n",
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v32->fail_msg);
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} else {
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const performance &perf = v32->performance_analysis.require();
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if (!INTEL_DEBUG(DEBUG_DO32) && throughput >= perf.throughput) {
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if (devinfo->ver >= 30) {
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} else {
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if ((!has_spilled && (!v8 || v8->max_dispatch_width >= 16) &&
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INTEL_SIMD(FS, 16)) ||
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reqd_dispatch_width == SUBGROUP_SIZE_REQUIRE_16) {
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/* Try a SIMD16 compile */
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v16 = std::make_unique<fs_visitor>(compiler, ¶ms->base, key,
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prog_data, nir, 16, 1,
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params->base.stats != NULL,
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debug_enabled);
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if (v8)
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v16->import_uniforms(v8.get());
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if (!run_fs(*v16, allow_spilling, params->use_rep_send)) {
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brw_shader_perf_log(compiler, params->base.log_data,
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"SIMD32 shader inefficient\n");
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"SIMD16 shader failed to compile: %s\n",
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v16->fail_msg);
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} else {
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simd32_cfg = v32->cfg;
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simd16_cfg = v16->cfg;
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assert(v32->payload().num_regs % reg_unit(devinfo) == 0);
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prog_data->dispatch_grf_start_reg_32 = v32->payload().num_regs / reg_unit(devinfo);
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assert(v16->payload().num_regs % reg_unit(devinfo) == 0);
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prog_data->dispatch_grf_start_reg_16 = v16->payload().num_regs / reg_unit(devinfo);
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const performance &perf = v16->performance_analysis.require();
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throughput = MAX2(throughput, perf.throughput);
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has_spilled = v16->spilled_any_registers;
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allow_spilling = false;
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}
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}
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const bool simd16_failed = v16 && !simd16_cfg;
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/* Currently, the compiler only supports SIMD32 on SNB+ */
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if (!has_spilled &&
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(!v8 || v8->max_dispatch_width >= 32) &&
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(!v16 || v16->max_dispatch_width >= 32) &&
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reqd_dispatch_width == SUBGROUP_SIZE_VARYING &&
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!simd16_failed && INTEL_SIMD(FS, 32)) {
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/* Try a SIMD32 compile */
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v32 = std::make_unique<fs_visitor>(compiler, ¶ms->base, key,
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prog_data, nir, 32, 1,
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params->base.stats != NULL,
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debug_enabled);
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if (v8)
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v32->import_uniforms(v8.get());
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else if (v16)
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v32->import_uniforms(v16.get());
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if (!run_fs(*v32, allow_spilling, false)) {
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brw_shader_perf_log(compiler, params->base.log_data,
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"SIMD32 shader failed to compile: %s\n",
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v32->fail_msg);
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} else {
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const performance &perf = v32->performance_analysis.require();
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if (!INTEL_DEBUG(DEBUG_DO32) && throughput >= perf.throughput) {
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brw_shader_perf_log(compiler, params->base.log_data,
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"SIMD32 shader inefficient\n");
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} else {
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simd32_cfg = v32->cfg;
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assert(v32->payload().num_regs % reg_unit(devinfo) == 0);
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prog_data->dispatch_grf_start_reg_32 = v32->payload().num_regs / reg_unit(devinfo);
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throughput = MAX2(throughput, perf.throughput);
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}
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}
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}
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if (devinfo->ver >= 12 && !has_spilled &&
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params->max_polygons >= 2 && !key->coarse_pixel &&
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reqd_dispatch_width == SUBGROUP_SIZE_VARYING) {
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fs_visitor *vbase = v8 ? v8.get() : v16 ? v16.get() : v32.get();
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assert(vbase);
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if (devinfo->ver >= 20 &&
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params->max_polygons >= 4 &&
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vbase->max_dispatch_width >= 32 &&
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4 * prog_data->num_varying_inputs <= MAX_VARYING &&
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INTEL_SIMD(FS, 4X8)) {
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/* Try a quad-SIMD8 compile */
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vmulti = std::make_unique<fs_visitor>(compiler, ¶ms->base, key,
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prog_data, nir, 32, 4,
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params->base.stats != NULL,
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debug_enabled);
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vmulti->import_uniforms(vbase);
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if (!run_fs(*vmulti, false, params->use_rep_send)) {
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brw_shader_perf_log(compiler, params->base.log_data,
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"Quad-SIMD8 shader failed to compile: %s\n",
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vmulti->fail_msg);
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} else {
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multi_cfg = vmulti->cfg;
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assert(!vmulti->spilled_any_registers);
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}
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}
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if (!multi_cfg && devinfo->ver >= 20 &&
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vbase->max_dispatch_width >= 32 &&
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2 * prog_data->num_varying_inputs <= MAX_VARYING &&
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INTEL_SIMD(FS, 2X16)) {
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/* Try a dual-SIMD16 compile */
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vmulti = std::make_unique<fs_visitor>(compiler, ¶ms->base, key,
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prog_data, nir, 32, 2,
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params->base.stats != NULL,
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debug_enabled);
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vmulti->import_uniforms(vbase);
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if (!run_fs(*vmulti, false, params->use_rep_send)) {
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brw_shader_perf_log(compiler, params->base.log_data,
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"Dual-SIMD16 shader failed to compile: %s\n",
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vmulti->fail_msg);
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} else {
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multi_cfg = vmulti->cfg;
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assert(!vmulti->spilled_any_registers);
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}
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}
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if (!multi_cfg && vbase->max_dispatch_width >= 16 &&
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2 * prog_data->num_varying_inputs <= MAX_VARYING &&
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INTEL_SIMD(FS, 2X8)) {
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/* Try a dual-SIMD8 compile */
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vmulti = std::make_unique<fs_visitor>(compiler, ¶ms->base, key,
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prog_data, nir, 16, 2,
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params->base.stats != NULL,
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debug_enabled);
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vmulti->import_uniforms(vbase);
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if (!run_fs(*vmulti, allow_spilling, params->use_rep_send)) {
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brw_shader_perf_log(compiler, params->base.log_data,
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"Dual-SIMD8 shader failed to compile: %s\n",
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vmulti->fail_msg);
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} else {
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multi_cfg = vmulti->cfg;
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}
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}
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}
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}
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if (devinfo->ver >= 12 && !has_spilled &&
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params->max_polygons >= 2 && !key->coarse_pixel &&
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reqd_dispatch_width == SUBGROUP_SIZE_VARYING) {
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fs_visitor *vbase = v8 ? v8.get() : v16 ? v16.get() : v32.get();
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assert(vbase);
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if (devinfo->ver >= 20 &&
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params->max_polygons >= 4 &&
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vbase->max_dispatch_width >= 32 &&
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4 * prog_data->num_varying_inputs <= MAX_VARYING &&
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INTEL_SIMD(FS, 4X8)) {
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/* Try a quad-SIMD8 compile */
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vmulti = std::make_unique<fs_visitor>(compiler, ¶ms->base, key,
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prog_data, nir, 32, 4,
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params->base.stats != NULL,
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debug_enabled);
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vmulti->import_uniforms(vbase);
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if (!run_fs(*vmulti, false, params->use_rep_send)) {
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brw_shader_perf_log(compiler, params->base.log_data,
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"Quad-SIMD8 shader failed to compile: %s\n",
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vmulti->fail_msg);
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} else {
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multi_cfg = vmulti->cfg;
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assert(!vmulti->spilled_any_registers);
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}
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}
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if (!multi_cfg && devinfo->ver >= 20 &&
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vbase->max_dispatch_width >= 32 &&
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2 * prog_data->num_varying_inputs <= MAX_VARYING &&
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INTEL_SIMD(FS, 2X16)) {
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/* Try a dual-SIMD16 compile */
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vmulti = std::make_unique<fs_visitor>(compiler, ¶ms->base, key,
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prog_data, nir, 32, 2,
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params->base.stats != NULL,
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debug_enabled);
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vmulti->import_uniforms(vbase);
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if (!run_fs(*vmulti, false, params->use_rep_send)) {
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brw_shader_perf_log(compiler, params->base.log_data,
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"Dual-SIMD16 shader failed to compile: %s\n",
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vmulti->fail_msg);
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} else {
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multi_cfg = vmulti->cfg;
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assert(!vmulti->spilled_any_registers);
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}
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}
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if (!multi_cfg && vbase->max_dispatch_width >= 16 &&
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2 * prog_data->num_varying_inputs <= MAX_VARYING &&
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INTEL_SIMD(FS, 2X8)) {
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/* Try a dual-SIMD8 compile */
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vmulti = std::make_unique<fs_visitor>(compiler, ¶ms->base, key,
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prog_data, nir, 16, 2,
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params->base.stats != NULL,
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debug_enabled);
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vmulti->import_uniforms(vbase);
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if (!run_fs(*vmulti, allow_spilling, params->use_rep_send)) {
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brw_shader_perf_log(compiler, params->base.log_data,
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"Dual-SIMD8 shader failed to compile: %s\n",
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vmulti->fail_msg);
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} else {
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multi_cfg = vmulti->cfg;
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}
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}
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if (multi_cfg) {
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assert(vmulti->payload().num_regs % reg_unit(devinfo) == 0);
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prog_data->base.dispatch_grf_start_reg = vmulti->payload().num_regs / reg_unit(devinfo);
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}
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if (multi_cfg) {
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assert(vmulti->payload().num_regs % reg_unit(devinfo) == 0);
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prog_data->base.dispatch_grf_start_reg = vmulti->payload().num_regs / reg_unit(devinfo);
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}
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/* When the caller compiles a repclear or fast clear shader, they
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