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r600/sfn: Handle CF index loading from non-X channel

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Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
This commit is contained in:
Gert Wollny 2020-05-06 23:49:41 +02:00 • committed by Marge Bot
parent 54c3d4bd24
commit afd47ea83b
3 changed files with 29 additions and 10 deletions
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12
src/gallium/drivers/r600/sfn/sfn_instruction_gds.cpp
View file

@ -37,28 +37,33 @@ GDSInstr::GDSInstr(ESDOp op, const GPRVector& dest, const PValue& value,
m_src2(value2),
m_dest(dest),
m_dest_swizzle({PIPE_SWIZZLE_X,7,7,7}),
m_src_swizzle({PIPE_SWIZZLE_0, PIPE_SWIZZLE_X, 7}),
m_src_swizzle({PIPE_SWIZZLE_0, PIPE_SWIZZLE_X, PIPE_SWIZZLE_0}),
m_buffer_index_mode(bim_none),
m_uav_id(uav_id),
m_uav_base(uav_base),
m_flags(0)
{
add_remappable_src_value(&m_src);
add_remappable_src_value(&m_src2);
add_remappable_src_value(&m_uav_id);
add_remappable_dst_value(&m_dest);
m_dest_swizzle[0] = m_dest.chan_i(0);
}
GDSInstr::GDSInstr(ESDOp op, const GPRVector& dest, const PValue& value,
const PValue& uav_id, int uav_base):
GDSInstr(op, dest, value, PValue(), uav_id, uav_base)
{
assert(value);
m_src_swizzle[1] = value->chan();
m_src_swizzle[2] = PIPE_SWIZZLE_MAX;
}
GDSInstr::GDSInstr(ESDOp op, const GPRVector& dest,
const PValue& uav_id, int uav_base):
GDSInstr(op, dest, PValue(), PValue(), uav_id, uav_base)
{
m_src_swizzle[1] = PIPE_SWIZZLE_1;
m_src_swizzle[1] = PIPE_SWIZZLE_0;
}
bool GDSInstr::is_equal_to(UNUSED const Instruction& lhs) const
@ -110,7 +115,8 @@ void RatInstruction::do_print(std::ostream& os) const
os << "MEM_RAT RAT(" << m_rat_id;
if (m_rat_id_offset)
os << "+" << *m_rat_id_offset;
os << ") @" << m_index << " OP:" << m_rat_op << " " << m_data;
os << ") @" << m_index;
os << " OP:" << m_rat_op << " " << m_data;
os << " BC:" << m_burst_count
<< " MASK:" << m_comp_mask
<< " ES:" << m_element_size;

1
src/gallium/drivers/r600/sfn/sfn_instruction_gds.h
View file

@ -151,6 +151,7 @@ public:
bool ack);
PValue rat_id_offset() const { return m_rat_id_offset;}
int rat_id() const { return m_rat_id;}
ERatOp rat_op() const {return m_rat_op;}

26
src/gallium/drivers/r600/sfn/sfn_ir_to_assembly.cpp
View file

@ -641,7 +641,8 @@ bool AssemblyFromShaderLegacyImpl::emit_tex(const TexInstruction & tex_instr)
{
auto addr = tex_instr.sampler_offset();
if (addr && (!m_bc->index_loaded[1] || m_loop_nesting
|| m_bc->index_reg[1] != addr->sel())) {
|| m_bc->index_reg[1] != addr->sel()
|| m_bc->index_reg_chan[1] != addr->chan())) {
struct r600_bytecode_alu alu;
memset(&alu, 0, sizeof(alu));
alu.op = opcode_map.at(op1_mova_int);
@ -666,6 +667,7 @@ bool AssemblyFromShaderLegacyImpl::emit_tex(const TexInstruction & tex_instr)
return false;
m_bc->index_reg[1] = addr->sel();
m_bc->index_reg_chan[1] = addr->chan();
m_bc->index_loaded[1] = true;
}
@ -720,7 +722,9 @@ bool AssemblyFromShaderLegacyImpl::emit_vtx(const FetchInstruction& fetch_instr)
buffer_offset = boffs.value();
} else {
index_mode = bim_zero;
if ((!m_bc->index_loaded[0] || m_loop_nesting || m_bc->index_reg[0] != addr->sel())) {
if ((!m_bc->index_loaded[0] || m_loop_nesting ||
m_bc->index_reg[0] != addr->sel() ||
m_bc->index_reg_chan[0] != addr->chan())) {
struct r600_bytecode_alu alu;
memset(&alu, 0, sizeof(alu));
alu.op = opcode_map.at(op1_mova_int);
@ -745,6 +749,7 @@ bool AssemblyFromShaderLegacyImpl::emit_vtx(const FetchInstruction& fetch_instr)
return false;
m_bc->index_reg[0] = addr->sel();
m_bc->index_reg_chan[0] = addr->chan();
m_bc->index_loaded[0] = true;
}
}
@ -878,7 +883,8 @@ bool AssemblyFromShaderLegacyImpl::emit_gds(const GDSInstr& instr)
auto addr = instr.uav_id();
if (addr->type() != Value::literal) {
if (!m_bc->index_loaded[1] || m_loop_nesting ||
m_bc->index_reg[1] != addr->sel()) {
m_bc->index_reg[1] != addr->sel()
|| m_bc->index_reg_chan[1] != addr->chan()) {
struct r600_bytecode_alu alu;
memset(&alu, 0, sizeof(alu));
@ -918,6 +924,7 @@ bool AssemblyFromShaderLegacyImpl::emit_gds(const GDSInstr& instr)
return false;
m_bc->index_reg[1] = addr->sel();
m_bc->index_reg_chan[1] = addr->chan();
m_bc->index_loaded[1] = true;
}
} else {
@ -1075,7 +1082,9 @@ bool AssemblyFromShaderLegacyImpl::emit_rat(const RatInstruction& instr)
if (addr) {
if (addr->type() != Value::literal) {
rat_index_mode = bim_one;
if (!m_bc->index_loaded[1] || m_loop_nesting || m_bc->index_reg[1] != addr->sel()) {
if (!m_bc->index_loaded[1] || m_loop_nesting ||
m_bc->index_reg[1] != addr->sel()
|| m_bc->index_reg_chan[1] != addr->chan()) {
struct r600_bytecode_alu alu;
memset(&alu, 0, sizeof(alu));
@ -1101,12 +1110,13 @@ bool AssemblyFromShaderLegacyImpl::emit_rat(const RatInstruction& instr)
return false;
m_bc->index_reg[1] = addr->sel();
m_bc->index_reg_chan[1] = addr->chan();
m_bc->index_loaded[1] = true;
}
} else {
const LiteralValue& addr_reg = static_cast<const LiteralValue&>(*addr);
rat_idx = addr_reg.value();
rat_idx += addr_reg.value();
}
}
memset(&gds, 0, sizeof(struct r600_bytecode_gds));
@ -1145,10 +1155,12 @@ bool AssemblyFromShaderLegacyImpl::copy_dst(r600_bytecode_alu_dst& dst,
dst.sel = d.sel();
dst.chan = d.chan();
if (m_bc->index_reg[1] == dst.sel)
if (m_bc->index_reg[1] == dst.sel &&
m_bc->index_reg_chan[1] == dst.chan)
m_bc->index_loaded[1] = false;
if (m_bc->index_reg[0] == dst.sel)
if (m_bc->index_reg[0] == dst.sel &&
m_bc->index_reg_chan[0] == dst.chan)
m_bc->index_loaded[0] = false;
return true;