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intel/hwconfig: Remove ignored intel_hwconfigs from apply_hwconfig_item()

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There is no reason to have it in the switch case.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34157>
This commit is contained in:
José Roberto de Souza 2024-12-03 09:49:50 -08:00 • committed by Marge Bot
parent 512b433172
commit aec3a72525
1 changed files with 0 additions and 63 deletions
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63
src/intel/dev/intel_hwconfig.c
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@ -218,20 +218,6 @@ process_hwconfig_item(struct intel_device_info *devinfo,
const bool check_only) const bool check_only)
{ {
switch (item->key) { switch (item->key) {
case INTEL_HWCONFIG_MAX_SLICES_SUPPORTED:
case INTEL_HWCONFIG_MAX_DUAL_SUBSLICES_SUPPORTED:
case INTEL_HWCONFIG_NUM_PIXEL_PIPES:
case INTEL_HWCONFIG_DEPRECATED_MAX_NUM_GEOMETRY_PIPES:
case INTEL_HWCONFIG_DEPRECATED_L3_CACHE_SIZE_IN_KB:
case INTEL_HWCONFIG_DEPRECATED_L3_BANK_COUNT:
case INTEL_HWCONFIG_L3_CACHE_WAYS_SIZE_IN_BYTES:
case INTEL_HWCONFIG_L3_CACHE_WAYS_PER_SECTOR:
case INTEL_HWCONFIG_MAX_MEMORY_CHANNELS:
case INTEL_HWCONFIG_MEMORY_TYPE:
case INTEL_HWCONFIG_CACHE_TYPES:
case INTEL_HWCONFIG_LOCAL_MEMORY_PAGE_SIZES_SUPPORTED:
case INTEL_HWCONFIG_DEPRECATED_SLM_SIZE_IN_KB:
break; /* ignore */
case INTEL_HWCONFIG_MAX_NUM_EU_PER_DSS: case INTEL_HWCONFIG_MAX_NUM_EU_PER_DSS:
DEVINFO_HWCONFIG(125, max_eus_per_subslice, item); DEVINFO_HWCONFIG(125, max_eus_per_subslice, item);
break; break;
@ -262,20 +248,9 @@ process_hwconfig_item(struct intel_device_info *devinfo,
case INTEL_HWCONFIG_URB_SIZE_PER_SLICE_IN_KB: case INTEL_HWCONFIG_URB_SIZE_PER_SLICE_IN_KB:
DEVINFO_HWCONFIG(125, urb.size, item); DEVINFO_HWCONFIG(125, urb.size, item);
break; break;
case INTEL_HWCONFIG_DEPRECATED_MAX_FILL_RATE:
case INTEL_HWCONFIG_MAX_RCS:
case INTEL_HWCONFIG_MAX_CCS:
case INTEL_HWCONFIG_MAX_VCS:
case INTEL_HWCONFIG_MAX_VECS:
case INTEL_HWCONFIG_MAX_COPY_CS:
case INTEL_HWCONFIG_DEPRECATED_URB_SIZE_IN_KB:
break; /* ignore */
case INTEL_HWCONFIG_MAX_VS_URB_ENTRIES: case INTEL_HWCONFIG_MAX_VS_URB_ENTRIES:
DEVINFO_HWCONFIG(200, urb.max_entries[MESA_SHADER_VERTEX], item); DEVINFO_HWCONFIG(200, urb.max_entries[MESA_SHADER_VERTEX], item);
break; break;
case INTEL_HWCONFIG_MIN_PCS_URB_ENTRIES:
case INTEL_HWCONFIG_MAX_PCS_URB_ENTRIES:
break; /* ignore */
case INTEL_HWCONFIG_MAX_HS_URB_ENTRIES: case INTEL_HWCONFIG_MAX_HS_URB_ENTRIES:
DEVINFO_HWCONFIG(200, urb.max_entries[MESA_SHADER_TESS_CTRL], item); DEVINFO_HWCONFIG(200, urb.max_entries[MESA_SHADER_TESS_CTRL], item);
break; break;
@ -285,44 +260,6 @@ process_hwconfig_item(struct intel_device_info *devinfo,
case INTEL_HWCONFIG_MAX_DS_URB_ENTRIES: case INTEL_HWCONFIG_MAX_DS_URB_ENTRIES:
DEVINFO_HWCONFIG(200, urb.max_entries[MESA_SHADER_TESS_EVAL], item); DEVINFO_HWCONFIG(200, urb.max_entries[MESA_SHADER_TESS_EVAL], item);
break; break;
case INTEL_HWCONFIG_MIN_VS_URB_ENTRIES:
case INTEL_HWCONFIG_MIN_HS_URB_ENTRIES:
case INTEL_HWCONFIG_MIN_GS_URB_ENTRIES:
case INTEL_HWCONFIG_MIN_DS_URB_ENTRIES:
case INTEL_HWCONFIG_PUSH_CONSTANT_URB_RESERVED_SIZE:
case INTEL_HWCONFIG_POCS_PUSH_CONSTANT_URB_RESERVED_SIZE:
case INTEL_HWCONFIG_URB_REGION_ALIGNMENT_SIZE_IN_BYTES:
case INTEL_HWCONFIG_URB_ALLOCATION_SIZE_UNITS_IN_BYTES:
case INTEL_HWCONFIG_MAX_URB_SIZE_CCS_IN_BYTES:
case INTEL_HWCONFIG_VS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT:
case INTEL_HWCONFIG_DS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT:
case INTEL_HWCONFIG_NUM_RT_STACKS_PER_DSS:
case INTEL_HWCONFIG_MAX_URB_STARTING_ADDRESS:
case INTEL_HWCONFIG_MIN_CS_URB_ENTRIES:
case INTEL_HWCONFIG_MAX_CS_URB_ENTRIES:
case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_URB:
case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_REST:
case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_DC:
case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RO:
case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_Z:
case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COLOR:
case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_UNIFIED_TILE_CACHE:
case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COMMAND_BUFFER:
case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RW:
case INTEL_HWCONFIG_MAX_NUM_L3_CONFIGS:
case INTEL_HWCONFIG_BINDLESS_SURFACE_OFFSET_BIT_COUNT:
case INTEL_HWCONFIG_RESERVED_CCS_WAYS:
case INTEL_HWCONFIG_CSR_SIZE_IN_MB:
case INTEL_HWCONFIG_GEOMETRY_PIPES_PER_SLICE:
case INTEL_HWCONFIG_L3_BANK_SIZE_IN_KB:
case INTEL_HWCONFIG_SLM_SIZE_PER_DSS:
case INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_SLICE:
case INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_DSS:
case INTEL_HWCONFIG_URB_SIZE_PER_L3_BANK_COUNT_IN_KB:
case INTEL_HWCONFIG_MAX_SUBSLICE:
case INTEL_HWCONFIG_MAX_EU_PER_SUBSLICE:
case INTEL_HWCONFIG_RAMBO_L3_BANK_SIZE_IN_KB:
case INTEL_HWCONFIG_SLM_SIZE_PER_SS_IN_KB:
default: default:
break; /* ignore */ break; /* ignore */
} }