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brw: Consider bfloat16 in lower simd width pass

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Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
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Caio Oliveira 2025-04-11 11:54:30 -07:00 • committed by Marge Bot
parent 2c31516b3e
commit a7ff177a88
1 changed files with 3 additions and 0 deletions
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src/intel/compiler/brw_lower_simd_width.cpp
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@ -110,6 +110,9 @@ get_fpu_lowered_simd_width(const brw_shader *shader,
if (inst->is_3src(compiler) && !devinfo->supports_simd16_3src)
max_width = MIN2(max_width, inst->exec_size / reg_count);
if (has_bfloat_operands(inst))
max_width = MIN2(max_width, devinfo->ver < 20 ? 8 : 16);
if (inst->opcode != BRW_OPCODE_MOV) {
/* From the SKL PRM, Special Restrictions for Handling Mixed Mode
* Float Operations: