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r600/sfn: extract function to update group after instr insert
Fixes: 359bfc3138 ("r600/sfn: make sure that kill and update pred are not in the same group")
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38112>
This commit is contained in:
parent
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commit
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3 changed files with 15 additions and 10 deletions
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@ -20,6 +20,14 @@ AluGroup::AluGroup()
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m_free_slots = has_t() ? 0x1f : 0xf;
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m_free_slots = has_t() ? 0x1f : 0xf;
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}
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}
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void
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AluGroup::apply_add_instr(AluInstr *instr)
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{
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instr->set_parent_group(this);
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instr->pin_dest_to_chan();
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m_has_kill_op |= instr->is_kill();
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}
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bool
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bool
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AluGroup::add_instruction(AluInstr *instr)
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AluGroup::add_instruction(AluInstr *instr)
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{
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{
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@ -32,17 +40,13 @@ AluGroup::add_instruction(AluInstr *instr)
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ASSERTED auto opinfo = alu_ops.find(instr->opcode());
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ASSERTED auto opinfo = alu_ops.find(instr->opcode());
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assert(opinfo->second.can_channel(AluOp::t, s_chip_class));
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assert(opinfo->second.can_channel(AluOp::t, s_chip_class));
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if (add_trans_instructions(instr)) {
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if (add_trans_instructions(instr)) {
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instr->set_parent_group(this);
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apply_add_instr(instr);
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instr->pin_dest_to_chan();
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m_has_kill_op |= instr->is_kill();
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return true;
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return true;
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}
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}
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}
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}
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if (add_vec_instructions(instr) && !instr->has_alu_flag(alu_is_trans)) {
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if (add_vec_instructions(instr) && !instr->has_alu_flag(alu_is_trans)) {
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instr->set_parent_group(this);
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apply_add_instr(instr);
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instr->pin_dest_to_chan();
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m_has_kill_op |= instr->is_kill();
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return true;
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return true;
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}
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}
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@ -51,9 +55,7 @@ AluGroup::add_instruction(AluInstr *instr)
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if (s_max_slots > 4 && opinfo->second.can_channel(AluOp::t, s_chip_class) &&
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if (s_max_slots > 4 && opinfo->second.can_channel(AluOp::t, s_chip_class) &&
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add_trans_instructions(instr)) {
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add_trans_instructions(instr)) {
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instr->set_parent_group(this);
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apply_add_instr(instr);
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instr->pin_dest_to_chan();
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m_has_kill_op |= instr->is_kill();
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return true;
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return true;
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}
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}
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@ -21,6 +21,7 @@ public:
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using iterator = Slots::iterator;
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using iterator = Slots::iterator;
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using const_iterator = Slots::const_iterator;
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using const_iterator = Slots::const_iterator;
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void extracted(AluInstr *& instr);
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bool add_instruction(AluInstr *instr);
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bool add_instruction(AluInstr *instr);
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bool add_trans_instructions(AluInstr *instr);
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bool add_trans_instructions(AluInstr *instr);
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bool add_vec_instructions(AluInstr *instr);
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bool add_vec_instructions(AluInstr *instr);
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@ -100,6 +101,8 @@ private:
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bool update_indirect_access(AluInstr *instr);
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bool update_indirect_access(AluInstr *instr);
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bool try_readport(AluInstr *instr, AluBankSwizzle cycle);
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bool try_readport(AluInstr *instr, AluBankSwizzle cycle);
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void apply_add_instr(AluInstr * instr);
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Slots m_slots;
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Slots m_slots;
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uint8_t m_next_slot_assignemnt{0};
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uint8_t m_next_slot_assignemnt{0};
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std::array<int8_t, 5> m_slot_assignemnt_order{-1, -1, -1, -1, -1};
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std::array<int8_t, 5> m_slot_assignemnt_order{-1, -1, -1, -1, -1};
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@ -869,7 +869,7 @@ BlockScheduler::schedule_alu_to_group_vec(AluGroup *group)
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bool success = false;
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bool success = false;
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auto i = alu_vec_ready.begin();
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auto i = alu_vec_ready.begin();
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auto e = alu_vec_ready.end();
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auto e = alu_vec_ready.end();
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bool group_has_kill = false;
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bool group_has_kill = group->has_kill_op();
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bool group_has_update_pred = false;
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bool group_has_update_pred = false;
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while (i != e) {
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while (i != e) {
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sfn_log << SfnLog::schedule << "Try schedule to vec " << **i;
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sfn_log << SfnLog::schedule << "Try schedule to vec " << **i;
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