diff --git a/src/gallium/drivers/r600/sfn/sfn_instr_alugroup.cpp b/src/gallium/drivers/r600/sfn/sfn_instr_alugroup.cpp
index c778be43b15..78aeccf5a0e 100644
--- a/src/gallium/drivers/r600/sfn/sfn_instr_alugroup.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_instr_alugroup.cpp
@@ -20,6 +20,14 @@ AluGroup::AluGroup()
    m_free_slots = has_t() ? 0x1f : 0xf;
 }
 
+void
+AluGroup::apply_add_instr(AluInstr *instr)
+{
+   instr->set_parent_group(this);
+   instr->pin_dest_to_chan();
+   m_has_kill_op |= instr->is_kill();
+}
+
 bool
 AluGroup::add_instruction(AluInstr *instr)
 {
@@ -32,17 +40,13 @@ AluGroup::add_instruction(AluInstr *instr)
       ASSERTED auto opinfo = alu_ops.find(instr->opcode());
       assert(opinfo->second.can_channel(AluOp::t, s_chip_class));
       if (add_trans_instructions(instr)) {
-         instr->set_parent_group(this);
-         instr->pin_dest_to_chan();
-         m_has_kill_op |= instr->is_kill();
+         apply_add_instr(instr);
          return true;
       }
    }
 
    if (add_vec_instructions(instr) && !instr->has_alu_flag(alu_is_trans)) {
-      instr->set_parent_group(this);
-      instr->pin_dest_to_chan();
-      m_has_kill_op |= instr->is_kill();
+      apply_add_instr(instr);
       return true;
    }
 
@@ -51,9 +55,7 @@ AluGroup::add_instruction(AluInstr *instr)
 
    if (s_max_slots > 4 && opinfo->second.can_channel(AluOp::t, s_chip_class) &&
        add_trans_instructions(instr)) {
-      instr->set_parent_group(this);
-      instr->pin_dest_to_chan();
-      m_has_kill_op |= instr->is_kill();
+      apply_add_instr(instr);
       return true;
    }
 
diff --git a/src/gallium/drivers/r600/sfn/sfn_instr_alugroup.h b/src/gallium/drivers/r600/sfn/sfn_instr_alugroup.h
index e694c9e520a..f85369fd980 100644
--- a/src/gallium/drivers/r600/sfn/sfn_instr_alugroup.h
+++ b/src/gallium/drivers/r600/sfn/sfn_instr_alugroup.h
@@ -21,6 +21,7 @@ public:
    using iterator = Slots::iterator;
    using const_iterator = Slots::const_iterator;
 
+   void extracted(AluInstr *& instr);
    bool add_instruction(AluInstr *instr);
    bool add_trans_instructions(AluInstr *instr);
    bool add_vec_instructions(AluInstr *instr);
@@ -100,6 +101,8 @@ private:
    bool update_indirect_access(AluInstr *instr);
    bool try_readport(AluInstr *instr, AluBankSwizzle cycle);
 
+   void apply_add_instr(AluInstr * instr);
+
    Slots m_slots;
    uint8_t m_next_slot_assignemnt{0};
    std::array<int8_t, 5> m_slot_assignemnt_order{-1, -1, -1, -1, -1};
diff --git a/src/gallium/drivers/r600/sfn/sfn_scheduler.cpp b/src/gallium/drivers/r600/sfn/sfn_scheduler.cpp
index a4e25281009..0d3eac93636 100644
--- a/src/gallium/drivers/r600/sfn/sfn_scheduler.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_scheduler.cpp
@@ -869,7 +869,7 @@ BlockScheduler::schedule_alu_to_group_vec(AluGroup *group)
    bool success = false;
    auto i = alu_vec_ready.begin();
    auto e = alu_vec_ready.end();
-   bool group_has_kill = false;
+   bool group_has_kill = group->has_kill_op();
    bool group_has_update_pred = false;
    while (i != e) {
       sfn_log << SfnLog::schedule << "Try schedule to vec " << **i;