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ac,radv,radeonsi: use correct swizzle/pitch for depth-only images with SDMA

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This fixes new VKCTS coverage
dEQP-VK.api.copy_and_blit.core.use_after_copy.*.

is_stencil isn't set for RadeonSI because it doesn't do SDMA copies
with Z/S.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 1be4ffdff9)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40092>
This commit is contained in:
Samuel Pitoiset 2026-02-10 09:57:04 +01:00 • committed by Eric Engestrom
parent 88e238de07
commit a2ad1789fa
5 changed files with 13 additions and 5 deletions
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2
.pick_status.json
View file

@ -5214,7 +5214,7 @@
"description": "ac,radv,radeonsi: use correct swizzle/pitch for depth-only images with SDMA",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": null,
"notes": null

10
src/amd/common/ac_cmdbuf_sdma.c
View file

@ -222,10 +222,12 @@ static uint32_t
ac_sdma_get_tiled_info_dword(const struct radeon_info *info,
const struct ac_sdma_surf_tiled *tiled)
{
const uint32_t swizzle_mode = tiled->surf->has_stencil ? tiled->surf->u.gfx9.zs.stencil_swizzle_mode
: tiled->surf->u.gfx9.swizzle_mode;
const uint16_t epitch = tiled->surf->has_stencil ? tiled->surf->u.gfx9.zs.stencil_epitch
: tiled->surf->u.gfx9.epitch;
const uint32_t swizzle_mode =
tiled->is_stencil ? tiled->surf->u.gfx9.zs.stencil_swizzle_mode
: tiled->surf->u.gfx9.swizzle_mode;
const uint16_t epitch =
tiled->is_stencil ? tiled->surf->u.gfx9.zs.stencil_epitch
: tiled->surf->u.gfx9.epitch;
const enum gfx9_resource_type dimension =
ac_sdma_get_tiled_resource_dim(info->sdma_ip_version, tiled);
const uint32_t mip_max = MAX2(tiled->num_levels, 1);

1
src/amd/common/ac_cmdbuf_sdma.h
View file

@ -61,6 +61,7 @@ struct ac_sdma_surf_tiled {
uint64_t va;
enum pipe_format format;
uint32_t bpp;
bool is_stencil;
struct {
uint32_t x;

4
src/amd/vulkan/radv_sdma.c
View file

@ -216,6 +216,7 @@ radv_sdma_get_surf(const struct radv_device *const device, const struct radv_ima
.texel_scale = radv_sdma_get_texel_scale(image),
.is_linear = surf->is_linear,
.is_3d = surf->u.gfx9.resource_type == RADEON_RESOURCE_3D,
.is_stencil = subresource.aspectMask == VK_IMAGE_ASPECT_STENCIL_BIT,
};
const uint64_t surf_offset = (subresource.aspectMask == VK_IMAGE_ASPECT_STENCIL_BIT) ? surf->u.gfx9.zs.stencil_offset
@ -371,6 +372,7 @@ radv_sdma_emit_copy_tiled_sub_window(const struct radv_device *device, struct ra
.va = tiled->va,
.format = radv_format_to_pipe_format(tiled->aspect_format),
.bpp = tiled->bpp,
.is_stencil = tiled->is_stencil,
.offset =
{
.x = tiled_off.x,
@ -414,6 +416,7 @@ radv_sdma_emit_copy_t2t_sub_window(const struct radv_device *device, struct radv
.va = src->va,
.format = radv_format_to_pipe_format(src->aspect_format),
.bpp = src->bpp,
.is_stencil = src->is_stencil,
.offset =
{
.x = src_off.x,
@ -439,6 +442,7 @@ radv_sdma_emit_copy_t2t_sub_window(const struct radv_device *device, struct radv
.va = dst->va,
.format = radv_format_to_pipe_format(dst->aspect_format),
.bpp = dst->bpp,
.is_stencil = dst->is_stencil,
.offset =
{
.x = dst_off.x,

1
src/amd/vulkan/radv_sdma.h
View file

@ -31,6 +31,7 @@ struct radv_sdma_surf {
uint8_t texel_scale; /* Texel scale for 96-bit formats */
bool is_linear; /* Whether the image is linear. */
bool is_3d; /* Whether the image is 3-dimensional. */
bool is_stencil; /* Whether the image is stencil only. */
union {
/* linear images only */