diff --git a/.pick_status.json b/.pick_status.json index b4067231024..40d609f4d5e 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -5214,7 +5214,7 @@ "description": "ac,radv,radeonsi: use correct swizzle/pitch for depth-only images with SDMA", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/amd/common/ac_cmdbuf_sdma.c b/src/amd/common/ac_cmdbuf_sdma.c index 3aa13076dfe..2c0cdbb3b5e 100644 --- a/src/amd/common/ac_cmdbuf_sdma.c +++ b/src/amd/common/ac_cmdbuf_sdma.c @@ -222,10 +222,12 @@ static uint32_t ac_sdma_get_tiled_info_dword(const struct radeon_info *info, const struct ac_sdma_surf_tiled *tiled) { - const uint32_t swizzle_mode = tiled->surf->has_stencil ? tiled->surf->u.gfx9.zs.stencil_swizzle_mode - : tiled->surf->u.gfx9.swizzle_mode; - const uint16_t epitch = tiled->surf->has_stencil ? tiled->surf->u.gfx9.zs.stencil_epitch - : tiled->surf->u.gfx9.epitch; + const uint32_t swizzle_mode = + tiled->is_stencil ? tiled->surf->u.gfx9.zs.stencil_swizzle_mode + : tiled->surf->u.gfx9.swizzle_mode; + const uint16_t epitch = + tiled->is_stencil ? tiled->surf->u.gfx9.zs.stencil_epitch + : tiled->surf->u.gfx9.epitch; const enum gfx9_resource_type dimension = ac_sdma_get_tiled_resource_dim(info->sdma_ip_version, tiled); const uint32_t mip_max = MAX2(tiled->num_levels, 1); diff --git a/src/amd/common/ac_cmdbuf_sdma.h b/src/amd/common/ac_cmdbuf_sdma.h index 2f8606a0a3b..621fc1e5084 100644 --- a/src/amd/common/ac_cmdbuf_sdma.h +++ b/src/amd/common/ac_cmdbuf_sdma.h @@ -61,6 +61,7 @@ struct ac_sdma_surf_tiled { uint64_t va; enum pipe_format format; uint32_t bpp; + bool is_stencil; struct { uint32_t x; diff --git a/src/amd/vulkan/radv_sdma.c b/src/amd/vulkan/radv_sdma.c index 47abe912b55..6cc0426087b 100644 --- a/src/amd/vulkan/radv_sdma.c +++ b/src/amd/vulkan/radv_sdma.c @@ -216,6 +216,7 @@ radv_sdma_get_surf(const struct radv_device *const device, const struct radv_ima .texel_scale = radv_sdma_get_texel_scale(image), .is_linear = surf->is_linear, .is_3d = surf->u.gfx9.resource_type == RADEON_RESOURCE_3D, + .is_stencil = subresource.aspectMask == VK_IMAGE_ASPECT_STENCIL_BIT, }; const uint64_t surf_offset = (subresource.aspectMask == VK_IMAGE_ASPECT_STENCIL_BIT) ? surf->u.gfx9.zs.stencil_offset @@ -371,6 +372,7 @@ radv_sdma_emit_copy_tiled_sub_window(const struct radv_device *device, struct ra .va = tiled->va, .format = radv_format_to_pipe_format(tiled->aspect_format), .bpp = tiled->bpp, + .is_stencil = tiled->is_stencil, .offset = { .x = tiled_off.x, @@ -414,6 +416,7 @@ radv_sdma_emit_copy_t2t_sub_window(const struct radv_device *device, struct radv .va = src->va, .format = radv_format_to_pipe_format(src->aspect_format), .bpp = src->bpp, + .is_stencil = src->is_stencil, .offset = { .x = src_off.x, @@ -439,6 +442,7 @@ radv_sdma_emit_copy_t2t_sub_window(const struct radv_device *device, struct radv .va = dst->va, .format = radv_format_to_pipe_format(dst->aspect_format), .bpp = dst->bpp, + .is_stencil = dst->is_stencil, .offset = { .x = dst_off.x, diff --git a/src/amd/vulkan/radv_sdma.h b/src/amd/vulkan/radv_sdma.h index 936730f1124..65470eba816 100644 --- a/src/amd/vulkan/radv_sdma.h +++ b/src/amd/vulkan/radv_sdma.h @@ -31,6 +31,7 @@ struct radv_sdma_surf { uint8_t texel_scale; /* Texel scale for 96-bit formats */ bool is_linear; /* Whether the image is linear. */ bool is_3d; /* Whether the image is 3-dimensional. */ + bool is_stencil; /* Whether the image is stencil only. */ union { /* linear images only */