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radv/gfx12: program SPI_SHADER_PGM_RSRC4_GS for seperately compiled gs

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Cc: mesa-stable

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42028>
This commit is contained in:
Georg Lehmann 2026-06-04 13:54:01 +02:00 • committed by Marge Bot
parent 22a8788dea
commit a23fc3f066
1 changed files with 3 additions and 1 deletions
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4
src/amd/vulkan/radv_cmd_buffer.c
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@ -3033,7 +3033,6 @@ radv_emit_hw_ngg(struct radv_cmd_buffer *cmd_buffer, const struct radv_shader *e
gfx12_push_sh_reg(shader->regs.pgm_lo, va >> 8);
gfx12_push_sh_reg(shader->regs.pgm_rsrc1, shader->config.rsrc1);
gfx12_push_sh_reg(shader->regs.pgm_rsrc2, shader->config.rsrc2);
gfx12_push_sh_reg(R_00B220_SPI_SHADER_PGM_RSRC4_GS, shader->regs.spi_shader_pgm_rsrc4_gs);
} else {
radeon_set_sh_reg(shader->regs.pgm_lo, va >> 8);
radeon_set_sh_reg_seq(shader->regs.pgm_rsrc1, 2);
@ -3139,6 +3138,9 @@ radv_emit_hw_ngg(struct radv_cmd_buffer *cmd_buffer, const struct radv_shader *e
if (pdev->info.gfx_level >= GFX12) {
radeon_set_uconfig_reg(R_030988_VGT_PRIMITIVEID_EN, shader->regs.ngg.vgt_primitiveid_en);
gfx12_push_sh_reg(R_00B220_SPI_SHADER_PGM_RSRC4_GS, shader->regs.spi_shader_pgm_rsrc4_gs);
gfx12_push_sh_reg(ngg_lds_layout_offset,
SET_SGPR_FIELD(NGG_LDS_LAYOUT_GS_OUT_VERTEX_BASE, shader->info.ngg_info.esgs_ring_size));
} else {