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ac/nir: split 8-bit SSBO stores on GFX6

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Due to possible alignment issues, make sure to split stores of
8-bit vectors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
(cherry picked from commit c6bf1597d1)
This commit is contained in:
Samuel Pitoiset 2020-01-29 14:38:55 +01:00 • committed by Dylan Baker
parent 87f1e7b1d8
commit a0e857c768
2 changed files with 10 additions and 1 deletions
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2
.pick_status.json
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@ -2371,7 +2371,7 @@
"description": "ac/nir: split 8-bit SSBO stores on GFX6",
"nominated": false,
"nomination_type": null,
"resolution": 4,
"resolution": 1,
"master_sha": null,
"because_sha": null
},

9
src/amd/llvm/ac_nir_to_llvm.c
View file

@ -1734,6 +1734,15 @@ static void visit_store_ssbo(struct ac_nir_context *ctx,
count = 1;
num_bytes = 2;
}
/* Due to alignment issues, split stores of 8-bit vectors. */
if (ctx->ac.chip_class == GFX6 &&
elem_size_bytes == 1 && count > 1) {
writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
count = 1;
num_bytes = 1;
}
data = extract_vector_range(&ctx->ac, base_data, start, count);
offset = LLVMBuildAdd(ctx->ac.builder, base_offset,