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nir: isub -> iadd_imm

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Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>
This commit is contained in:
Erik Faye-Lund 2023-06-05 12:41:14 +02:00 • committed by Marge Bot
parent 8b03a54bcd
commit 9e5cd02fae
2 changed files with 5 additions and 5 deletions
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4
src/amd/common/ac_nir_lower_ngg.c
View file

@ -2910,9 +2910,9 @@ ngg_gs_export_primitives(nir_builder *b, nir_ssa_def *max_num_out_prims, nir_ssa
nir_ssa_def *vtx_indices[3] = {0};
vtx_indices[s->num_vertices_per_primitive - 1] = exporter_tid_in_tg;
if (s->num_vertices_per_primitive >= 2)
vtx_indices[s->num_vertices_per_primitive - 2] = nir_isub(b, exporter_tid_in_tg, nir_imm_int(b, 1));
vtx_indices[s->num_vertices_per_primitive - 2] = nir_iadd_imm(b, exporter_tid_in_tg, -1);
if (s->num_vertices_per_primitive == 3)
vtx_indices[s->num_vertices_per_primitive - 3] = nir_isub(b, exporter_tid_in_tg, nir_imm_int(b, 2));
vtx_indices[s->num_vertices_per_primitive - 3] = nir_iadd_imm(b, exporter_tid_in_tg, -2);
if (s->num_vertices_per_primitive == 3) {
/* API GS outputs triangle strips, but NGG HW understands triangles.

6
src/compiler/nir/nir_lower_fp16_conv.c
View file

@ -113,9 +113,9 @@ float_to_half_impl(nir_builder *b, nir_ssa_def *src, nir_rounding_mode mode)
/* FP16 will be normal */
nir_ssa_def *value = nir_ior(b,
nir_ishl_imm(b,
nir_isub(b,
nir_ushr_imm(b, abs, 23),
nir_imm_int(b, 112)),
nir_iadd_imm(b,
nir_ushr_imm(b, abs, 23),
-112),
10),
nir_iand_imm(b, nir_ushr_imm(b, abs, 13), 0x3FFF));
nir_ssa_def *guard = nir_iand(b, nir_ushr_imm(b, abs, 12), one);