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brw: Allow generating destination with stride 2 in 3-src instructions

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Will be useful for testing BFloat16 in later patches.  No change
expected to the compiler itself.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33664>
This commit is contained in:
Caio Oliveira 2025-02-21 02:04:14 -08:00 • committed by Marge Bot
parent 676b874ca9
commit 9dfff2cb14
2 changed files with 30 additions and 2 deletions
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17
src/intel/compiler/brw_disasm.c
View file

@ -953,6 +953,17 @@ dest(FILE *file, const struct brw_isa_info *isa, const brw_eu_inst *inst)
return 0; return 0;
} }
static enum brw_horizontal_stride
hstride_from_align1_3src_dst_hstride(enum gfx10_align1_3src_dst_horizontal_stride hstride)
{
switch (hstride) {
case BRW_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_1: return BRW_HORIZONTAL_STRIDE_1;
case BRW_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_2: return BRW_HORIZONTAL_STRIDE_2;
default:
unreachable("not reached");
}
}
static int static int
dest_3src(FILE *file, const struct intel_device_info *devinfo, dest_3src(FILE *file, const struct intel_device_info *devinfo,
const brw_eu_inst *inst) const brw_eu_inst *inst)
@ -988,7 +999,11 @@ dest_3src(FILE *file, const struct intel_device_info *devinfo,
if (subreg_nr) if (subreg_nr)
format(file, ".%u", subreg_nr); format(file, ".%u", subreg_nr);
string(file, "<1>"); string(file, "<");
unsigned _horiz_stride =
hstride_from_align1_3src_dst_hstride(brw_eu_inst_3src_a1_dst_hstride(devinfo, inst));
err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL);
string(file, ">");
if (!is_align1) { if (!is_align1) {
err |= control(file, "writemask", writemask, err |= control(file, "writemask", writemask,

15
src/intel/compiler/brw_eu_emit.c
View file

@ -531,6 +531,18 @@ to_3src_align1_vstride(const struct intel_device_info *devinfo,
} }
} }
static enum gfx10_align1_3src_dst_horizontal_stride
to_3src_align1_dst_hstride(enum brw_horizontal_stride hstride)
{
switch (hstride) {
case BRW_HORIZONTAL_STRIDE_1:
return BRW_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_1;
case BRW_HORIZONTAL_STRIDE_2:
return BRW_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_2;
default:
unreachable("invalid hstride");
}
}
static enum gfx10_align1_3src_src_horizontal_stride static enum gfx10_align1_3src_src_horizontal_stride
to_3src_align1_hstride(enum brw_horizontal_stride hstride) to_3src_align1_hstride(enum brw_horizontal_stride hstride)
@ -596,7 +608,8 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest,
brw_eu_inst_set_3src_a1_dst_reg_file(devinfo, inst, phys_file(dest)); brw_eu_inst_set_3src_a1_dst_reg_file(devinfo, inst, phys_file(dest));
brw_eu_inst_set_3src_dst_reg_nr(devinfo, inst, phys_nr(devinfo, dest)); brw_eu_inst_set_3src_dst_reg_nr(devinfo, inst, phys_nr(devinfo, dest));
brw_eu_inst_set_3src_a1_dst_subreg_nr(devinfo, inst, phys_subnr(devinfo, dest) / 8); brw_eu_inst_set_3src_a1_dst_subreg_nr(devinfo, inst, phys_subnr(devinfo, dest) / 8);
brw_eu_inst_set_3src_a1_dst_hstride(devinfo, inst, BRW_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_1); brw_eu_inst_set_3src_a1_dst_hstride(devinfo, inst,
to_3src_align1_dst_hstride(dest.hstride));
if (brw_type_is_float(dest.type)) { if (brw_type_is_float(dest.type)) {
brw_eu_inst_set_3src_a1_exec_type(devinfo, inst, brw_eu_inst_set_3src_a1_exec_type(devinfo, inst,