From 9dfff2cb14a0038b272de1cda9cf89e15434cc05 Mon Sep 17 00:00:00 2001 From: Caio Oliveira Date: Fri, 21 Feb 2025 02:04:14 -0800 Subject: [PATCH] brw: Allow generating destination with stride 2 in 3-src instructions Will be useful for testing BFloat16 in later patches. No change expected to the compiler itself. Reviewed-by: Ian Romanick Reviewed-by: Rohan Garg Reviewed-by: Kenneth Graunke Part-of: --- src/intel/compiler/brw_disasm.c | 17 ++++++++++++++++- src/intel/compiler/brw_eu_emit.c | 15 ++++++++++++++- 2 files changed, 30 insertions(+), 2 deletions(-) diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c index 301d686ff2c..399324b75d1 100644 --- a/src/intel/compiler/brw_disasm.c +++ b/src/intel/compiler/brw_disasm.c @@ -953,6 +953,17 @@ dest(FILE *file, const struct brw_isa_info *isa, const brw_eu_inst *inst) return 0; } +static enum brw_horizontal_stride +hstride_from_align1_3src_dst_hstride(enum gfx10_align1_3src_dst_horizontal_stride hstride) +{ + switch (hstride) { + case BRW_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_1: return BRW_HORIZONTAL_STRIDE_1; + case BRW_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_2: return BRW_HORIZONTAL_STRIDE_2; + default: + unreachable("not reached"); + } +} + static int dest_3src(FILE *file, const struct intel_device_info *devinfo, const brw_eu_inst *inst) @@ -988,7 +999,11 @@ dest_3src(FILE *file, const struct intel_device_info *devinfo, if (subreg_nr) format(file, ".%u", subreg_nr); - string(file, "<1>"); + string(file, "<"); + unsigned _horiz_stride = + hstride_from_align1_3src_dst_hstride(brw_eu_inst_3src_a1_dst_hstride(devinfo, inst)); + err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL); + string(file, ">"); if (!is_align1) { err |= control(file, "writemask", writemask, diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index 463feed8703..e1bde043803 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -531,6 +531,18 @@ to_3src_align1_vstride(const struct intel_device_info *devinfo, } } +static enum gfx10_align1_3src_dst_horizontal_stride +to_3src_align1_dst_hstride(enum brw_horizontal_stride hstride) +{ + switch (hstride) { + case BRW_HORIZONTAL_STRIDE_1: + return BRW_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_1; + case BRW_HORIZONTAL_STRIDE_2: + return BRW_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_2; + default: + unreachable("invalid hstride"); + } +} static enum gfx10_align1_3src_src_horizontal_stride to_3src_align1_hstride(enum brw_horizontal_stride hstride) @@ -596,7 +608,8 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, brw_eu_inst_set_3src_a1_dst_reg_file(devinfo, inst, phys_file(dest)); brw_eu_inst_set_3src_dst_reg_nr(devinfo, inst, phys_nr(devinfo, dest)); brw_eu_inst_set_3src_a1_dst_subreg_nr(devinfo, inst, phys_subnr(devinfo, dest) / 8); - brw_eu_inst_set_3src_a1_dst_hstride(devinfo, inst, BRW_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_1); + brw_eu_inst_set_3src_a1_dst_hstride(devinfo, inst, + to_3src_align1_dst_hstride(dest.hstride)); if (brw_type_is_float(dest.type)) { brw_eu_inst_set_3src_a1_exec_type(devinfo, inst,