fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-03-12 11:10:34 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 3

util/cpu: add a number of RISC-V extensions

Browse source 
Add a few RISC-V extensions that could be detected by the riscv_hwprobe
interface of Linux v6.5+, and add caps for FD/C extensions.

The real probe code will come in the following commit, only a stub that
still assumes GC is added.

Adding these bits also changed the size of non-cache-related CPU
information from 4 dwords to 5, so the code hashing it for shader cache
in llvmpipe is also updated.

Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39154>
This commit is contained in:
Icenowy Zheng 2026-01-05 15:59:40 +08:00 • committed by Marge Bot
parent 0880c8d564
commit 9dfcd141cf
4 changed files with 38 additions and 8 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

14
src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
View file

@ -410,11 +410,15 @@ lp_build_fill_mattrs(std::vector<std::string> &MAttrs)
#endif
#if DETECT_ARCH_RISCV64 == 1
/* Before riscv is more matured and util_get_cpu_caps() is implemented,
* assume this for now since most of linux capable riscv machine are
* riscv64gc
*/
MAttrs = {"+m","+c","+a","+d","+f"};
/* Linux currently requires IMA, so hardcode it */
MAttrs = {"+m","+a"};
MAttrs.push_back(util_get_cpu_caps()->has_rv_fd ? "+f" : "-f");
MAttrs.push_back(util_get_cpu_caps()->has_rv_fd ? "+d" : "-d");
MAttrs.push_back(util_get_cpu_caps()->has_rv_c ? "+c" : "-c");
MAttrs.push_back(util_get_cpu_caps()->has_rv_v ? "+v" : "-v");
MAttrs.push_back(util_get_cpu_caps()->has_rv_zba ? "+zba" : "-zba");
MAttrs.push_back(util_get_cpu_caps()->has_rv_zbb ? "+zbb" : "-zbb");
MAttrs.push_back(util_get_cpu_caps()->has_rv_zbs ? "+zbb" : "-zbs");
#endif
#if DETECT_ARCH_LOONGARCH64 == 1

6
src/gallium/drivers/llvmpipe/lp_screen.c
View file

@ -838,11 +838,11 @@ update_cache_sha1_cpu(struct mesa_sha1 *ctx)
const struct util_cpu_caps_t *cpu_caps = util_get_cpu_caps();
/*
* Don't need the cpu cache affinity stuff. The rest
* is contained in first 4 dwords.
* is contained in first 5 dwords.
*/
STATIC_ASSERT(offsetof(struct util_cpu_caps_t, num_L3_caches)
== 4 * sizeof(uint32_t));
_mesa_sha1_update(ctx, cpu_caps, 4 * sizeof(uint32_t));
== 5 * sizeof(uint32_t));
_mesa_sha1_update(ctx, cpu_caps, 5 * sizeof(uint32_t));
}

19
src/util/u_cpu_detect.c
View file

@ -441,6 +441,15 @@ check_os_loongarch64_support(void)
}
#endif /* DETECT_ARCH_LOONGARCH64 */
#if DETECT_ARCH_RISCV
static void
check_os_riscv_support(void)
{
/* Stub code assume GC (IMAFDC) */
util_cpu_caps.has_rv_fd = 1;
util_cpu_caps.has_rv_c = 1;
}
#endif
static void
get_cpu_topology(bool zen)
@ -886,6 +895,10 @@ _util_cpu_detect_once(void)
check_os_loongarch64_support();
#endif /* DETECT_ARCH_LOONGARCH64 */
#if DETECT_ARCH_RISCV
check_os_riscv_support();
#endif /* DETECT_ARCH_RISCV */
check_cpu_caps_override();
/* max_vector_bits should be checked after cpu caps override */
@ -916,6 +929,12 @@ _util_cpu_detect_once(void)
printf("util_cpu_caps.has_daz = %u\n", util_cpu_caps.has_daz);
printf("util_cpu_caps.has_lsx = %u\n", util_cpu_caps.has_lsx);
printf("util_cpu_caps.has_lasx = %u\n", util_cpu_caps.has_lasx);
printf("util_cpu_caps.has_rv_fd = %u\n", util_cpu_caps.has_rv_fd);
printf("util_cpu_caps.has_rv_c = %u\n", util_cpu_caps.has_rv_c);
printf("util_cpu_caps.has_rv_v = %u\n", util_cpu_caps.has_rv_v);
printf("util_cpu_caps.has_rv_zba = %u\n", util_cpu_caps.has_rv_zba);
printf("util_cpu_caps.has_rv_zbb = %u\n", util_cpu_caps.has_rv_zbb);
printf("util_cpu_caps.has_rv_zbs = %u\n", util_cpu_caps.has_rv_zbs);
printf("util_cpu_caps.has_avx512f = %u\n", util_cpu_caps.has_avx512f);
printf("util_cpu_caps.has_avx512dq = %u\n", util_cpu_caps.has_avx512dq);
printf("util_cpu_caps.has_avx512ifma = %u\n", util_cpu_caps.has_avx512ifma);

7
src/util/u_cpu_detect.h
View file

@ -104,6 +104,13 @@ struct util_cpu_caps_t {
unsigned has_clflushopt:1;
unsigned has_rv_fd:1;
unsigned has_rv_c:1;
unsigned has_rv_v:1;
unsigned has_rv_zba:1;
unsigned has_rv_zbb:1;
unsigned has_rv_zbs:1;
unsigned num_L3_caches;
unsigned num_cpu_mask_bits;
unsigned max_vector_bits;