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iris: remove iris_get_param and iris_get_paramf
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32955>
This commit is contained in:
Qiang Yu
Marge Bot
parent
3465d008e1
commit
9a06c6c321
1 changed files with 0 additions and 285 deletions
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@ -193,289 +193,6 @@ iris_get_video_memory(struct iris_screen *screen)
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}
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}
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static int
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iris_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
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{
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struct iris_screen *screen = (struct iris_screen *)pscreen;
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const struct intel_device_info *devinfo = screen->devinfo;
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switch (param) {
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case PIPE_CAP_NPOT_TEXTURES:
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case PIPE_CAP_ANISOTROPIC_FILTER:
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case PIPE_CAP_OCCLUSION_QUERY:
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case PIPE_CAP_QUERY_TIME_ELAPSED:
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case PIPE_CAP_TEXTURE_SWIZZLE:
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case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
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case PIPE_CAP_BLEND_EQUATION_SEPARATE:
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case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
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case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
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case PIPE_CAP_PRIMITIVE_RESTART:
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case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
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case PIPE_CAP_INDEP_BLEND_ENABLE:
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case PIPE_CAP_INDEP_BLEND_FUNC:
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case PIPE_CAP_FS_COORD_ORIGIN_UPPER_LEFT:
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case PIPE_CAP_FS_COORD_PIXEL_CENTER_INTEGER:
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case PIPE_CAP_DEPTH_CLIP_DISABLE:
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case PIPE_CAP_VS_INSTANCEID:
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case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
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case PIPE_CAP_SEAMLESS_CUBE_MAP:
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case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
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case PIPE_CAP_CONDITIONAL_RENDER:
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case PIPE_CAP_TEXTURE_BARRIER:
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case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
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case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
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case PIPE_CAP_COMPUTE:
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case PIPE_CAP_START_INSTANCE:
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case PIPE_CAP_QUERY_TIMESTAMP:
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case PIPE_CAP_TEXTURE_MULTISAMPLE:
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case PIPE_CAP_CUBE_MAP_ARRAY:
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case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
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case PIPE_CAP_QUERY_PIPELINE_STATISTICS_SINGLE:
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case PIPE_CAP_TEXTURE_QUERY_LOD:
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case PIPE_CAP_SAMPLE_SHADING:
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case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
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case PIPE_CAP_DRAW_INDIRECT:
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case PIPE_CAP_MULTI_DRAW_INDIRECT:
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case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
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case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
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case PIPE_CAP_VS_LAYER_VIEWPORT:
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case PIPE_CAP_TES_LAYER_VIEWPORT:
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case PIPE_CAP_FS_FINE_DERIVATIVE:
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case PIPE_CAP_SHADER_PACK_HALF_FLOAT:
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case PIPE_CAP_ACCELERATED:
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case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
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case PIPE_CAP_CLIP_HALFZ:
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case PIPE_CAP_TGSI_TEXCOORD:
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case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
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case PIPE_CAP_DOUBLES:
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case PIPE_CAP_INT64:
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case PIPE_CAP_SAMPLER_VIEW_TARGET:
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case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
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case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
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case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
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case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
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case PIPE_CAP_CULL_DISTANCE:
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case PIPE_CAP_PACKED_UNIFORMS:
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case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
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case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
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case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
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case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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case PIPE_CAP_QUERY_SO_OVERFLOW:
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case PIPE_CAP_QUERY_BUFFER_OBJECT:
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case PIPE_CAP_TGSI_TEX_TXF_LZ:
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case PIPE_CAP_TEXTURE_QUERY_SAMPLES:
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case PIPE_CAP_SHADER_CLOCK:
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case PIPE_CAP_SHADER_BALLOT:
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case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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case PIPE_CAP_CLEAR_SCISSORED:
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case PIPE_CAP_SHADER_GROUP_VOTE:
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case PIPE_CAP_VS_WINDOW_SPACE_POSITION:
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case PIPE_CAP_TEXTURE_GATHER_SM5:
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case PIPE_CAP_SHADER_ARRAY_COMPONENTS:
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case PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS:
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case PIPE_CAP_LOAD_CONSTBUF:
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case PIPE_CAP_DRAW_PARAMETERS:
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case PIPE_CAP_FS_POSITION_IS_SYSVAL:
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case PIPE_CAP_FS_FACE_IS_INTEGER_SYSVAL:
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case PIPE_CAP_COMPUTE_SHADER_DERIVATIVES:
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case PIPE_CAP_INVALIDATE_BUFFER:
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case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
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case PIPE_CAP_TEXTURE_SHADOW_LOD:
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case PIPE_CAP_SHADER_SAMPLES_IDENTICAL:
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case PIPE_CAP_GL_SPIRV:
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case PIPE_CAP_GL_SPIRV_VARIABLE_POINTERS:
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case PIPE_CAP_DEMOTE_TO_HELPER_INVOCATION:
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case PIPE_CAP_NATIVE_FENCE_FD:
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case PIPE_CAP_MEMOBJ:
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case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
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case PIPE_CAP_FENCE_SIGNAL:
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case PIPE_CAP_IMAGE_STORE_FORMATTED:
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case PIPE_CAP_LEGACY_MATH_RULES:
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case PIPE_CAP_ALPHA_TO_COVERAGE_DITHER_CONTROL:
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case PIPE_CAP_MAP_UNSYNCHRONIZED_THREAD_SAFE:
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case PIPE_CAP_HAS_CONST_BW:
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case PIPE_CAP_CL_GL_SHARING:
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return true;
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case PIPE_CAP_UMA:
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return iris_bufmgr_vram_size(screen->bufmgr) == 0;
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case PIPE_CAP_QUERY_MEMORY_INFO:
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return iris_bufmgr_vram_size(screen->bufmgr) != 0;
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case PIPE_CAP_PREFER_BACK_BUFFER_REUSE:
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return false;
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case PIPE_CAP_FBFETCH:
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return IRIS_MAX_DRAW_BUFFERS;
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case PIPE_CAP_FBFETCH_COHERENT:
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return devinfo->ver >= 9 && devinfo->ver < 20;
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case PIPE_CAP_CONSERVATIVE_RASTER_INNER_COVERAGE:
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case PIPE_CAP_POST_DEPTH_COVERAGE:
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case PIPE_CAP_SHADER_STENCIL_EXPORT:
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case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
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case PIPE_CAP_FRAGMENT_SHADER_INTERLOCK:
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case PIPE_CAP_ATOMIC_FLOAT_MINMAX:
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return devinfo->ver >= 9;
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case PIPE_CAP_DEPTH_BOUNDS_TEST:
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return devinfo->ver >= 12;
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case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
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return 1;
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case PIPE_CAP_MAX_RENDER_TARGETS:
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return IRIS_MAX_DRAW_BUFFERS;
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case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
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return 16384;
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case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
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return IRIS_MAX_MIPLEVELS; /* 16384x16384 */
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case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
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return 12; /* 2048x2048 */
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case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
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return 4;
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case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
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return 2048;
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case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
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return IRIS_MAX_SOL_BINDINGS / IRIS_MAX_SOL_BUFFERS;
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case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
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return IRIS_MAX_SOL_BINDINGS;
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case PIPE_CAP_GLSL_FEATURE_LEVEL:
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case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
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return 460;
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case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
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/* 3DSTATE_CONSTANT_XS requires the start of UBOs to be 32B aligned */
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return 32;
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case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
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return IRIS_MAP_BUFFER_ALIGNMENT;
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case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
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return 4;
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case PIPE_CAP_MAX_SHADER_BUFFER_SIZE_UINT:
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return 1 << 27;
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case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
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return 16; // XXX: u_screen says 256 is the minimum value...
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case PIPE_CAP_LINEAR_IMAGE_PITCH_ALIGNMENT:
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return 1;
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case PIPE_CAP_LINEAR_IMAGE_BASE_ADDRESS_ALIGNMENT:
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return 1;
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case PIPE_CAP_TEXTURE_TRANSFER_MODES:
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return PIPE_TEXTURE_TRANSFER_BLIT;
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case PIPE_CAP_MAX_TEXEL_BUFFER_ELEMENTS_UINT:
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return IRIS_MAX_TEXTURE_BUFFER_SIZE;
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case PIPE_CAP_MAX_VIEWPORTS:
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return 16;
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case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
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return 256;
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case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
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return 1024;
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case PIPE_CAP_MAX_GS_INVOCATIONS:
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return 32;
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case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
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return 4;
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case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
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return -32;
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case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
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return 31;
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case PIPE_CAP_MAX_VERTEX_STREAMS:
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return 4;
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case PIPE_CAP_VENDOR_ID:
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return 0x8086;
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case PIPE_CAP_DEVICE_ID:
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return screen->devinfo->pci_device_id;
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case PIPE_CAP_VIDEO_MEMORY:
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return iris_get_video_memory(screen);
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case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
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case PIPE_CAP_MAX_VARYINGS:
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return 32;
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case PIPE_CAP_PREFER_IMM_ARRAYS_AS_CONSTBUF:
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/* We want immediate arrays to go get uploaded as nir->constant_data by
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* nir_opt_large_constants() instead.
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*/
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return 0;
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case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
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/* AMD_pinned_memory assumes the flexibility of using client memory
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* for any buffer (incl. vertex buffers) which rules out the prospect
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* of using snooped buffers, as using snooped buffers without
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* cogniscience is likely to be detrimental to performance and require
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* extensive checking in the driver for correctness, e.g. to prevent
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* illegal snoop <-> snoop transfers.
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*/
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return devinfo->has_llc;
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case PIPE_CAP_THROTTLE:
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return screen->driconf.disable_throttling ? 0 : 1;
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case PIPE_CAP_CONTEXT_PRIORITY_MASK:
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return PIPE_CONTEXT_PRIORITY_LOW |
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PIPE_CONTEXT_PRIORITY_MEDIUM |
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PIPE_CONTEXT_PRIORITY_HIGH;
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case PIPE_CAP_FRONTEND_NOOP:
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return true;
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// XXX: don't hardcode 00:00:02.0 PCI here
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case PIPE_CAP_PCI_GROUP:
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return 0;
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case PIPE_CAP_PCI_BUS:
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return 0;
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case PIPE_CAP_PCI_DEVICE:
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return 2;
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case PIPE_CAP_PCI_FUNCTION:
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return 0;
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case PIPE_CAP_OPENCL_INTEGER_FUNCTIONS:
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case PIPE_CAP_INTEGER_MULTIPLY_32X16:
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return true;
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case PIPE_CAP_ALLOW_DYNAMIC_VAO_FASTPATH:
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/* Internal details of VF cache make this optimization harmful on GFX
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* version 8 and 9, because generated VERTEX_BUFFER_STATEs are cached
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* separately.
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*/
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return devinfo->ver >= 11;
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case PIPE_CAP_TIMER_RESOLUTION:
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return DIV_ROUND_UP(1000000000ull, devinfo->timestamp_frequency);
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case PIPE_CAP_DEVICE_PROTECTED_CONTEXT:
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return screen->kernel_features & KERNEL_HAS_PROTECTED_CONTEXT;
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case PIPE_CAP_ASTC_VOID_EXTENTS_NEED_DENORM_FLUSH:
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return devinfo->ver == 9 && !intel_device_info_is_9lp(devinfo);
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default:
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return u_pipe_screen_get_param_defaults(pscreen, param);
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}
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return 0;
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}
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static float
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iris_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
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{
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switch (param) {
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case PIPE_CAPF_MIN_LINE_WIDTH:
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case PIPE_CAPF_MIN_LINE_WIDTH_AA:
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case PIPE_CAPF_MIN_POINT_SIZE:
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case PIPE_CAPF_MIN_POINT_SIZE_AA:
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return 1;
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case PIPE_CAPF_POINT_SIZE_GRANULARITY:
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case PIPE_CAPF_LINE_WIDTH_GRANULARITY:
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return 0.1;
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case PIPE_CAPF_MAX_LINE_WIDTH:
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case PIPE_CAPF_MAX_LINE_WIDTH_AA:
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return 7.375f;
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case PIPE_CAPF_MAX_POINT_SIZE:
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case PIPE_CAPF_MAX_POINT_SIZE_AA:
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return 255.0f;
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case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
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return 16.0f;
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case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
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return 15.0f;
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case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
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case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
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case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
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return 0.0f;
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default:
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unreachable("unknown param");
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}
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}
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static int
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iris_get_shader_param(struct pipe_screen *pscreen,
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enum pipe_shader_type p_stage,
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@ -1113,10 +830,8 @@ iris_screen_create(int fd, const struct pipe_screen_config *config)
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pscreen->get_device_vendor = iris_get_device_vendor;
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pscreen->get_cl_cts_version = iris_get_cl_cts_version;
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pscreen->get_screen_fd = iris_screen_get_fd;
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pscreen->get_param = iris_get_param;
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pscreen->get_shader_param = iris_get_shader_param;
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pscreen->get_compute_param = iris_get_compute_param;
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pscreen->get_paramf = iris_get_paramf;
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pscreen->get_compiler_options = iris_get_compiler_options;
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pscreen->get_device_uuid = iris_get_device_uuid;
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pscreen->get_driver_uuid = iris_get_driver_uuid;
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