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etnaviv: Disable seamless cube map on GC880
The GC880 on iMX6DL indicates in it's minorFeatures2 register that it does support SEAMLESS_CUBE_MAP, however when the TE.SAMPLER_CONFIG1 VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP bit is set on GC880 on iMX6DL, the result is corrupted image. In particular, the following ~112 dEQPs are affected and fail: dEQP-GLES2.functional.texture.filtering.cube.* This only happens on MX6DL GC880, MX6Q GC2000 and STM32MP1 GC400(GCnano) do not report the minorFeatures2 SEAMLESS_CUBE_MAP bit and ignore the TE_SAMPLER_CONFIG1 VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP bit (note that ss->seamless_cube_map is unconditionally set by mesa at times even PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE returns 0), so there is no visible problem and there are no failing dEQP tests on the GC2000 and GCnano. This might imply that the minorFeatures2 SEAMLESS_CUBE_MAP has some different meaning on GC880 or the SEAMLESS_CUBE_MAP behaves differently on the GC880. This patch does not set the SEAMLESS_CUBE_MAP bit on hardware which does not indicate support for seamless cube map and on GC880, which results in reduction in failed dEQPs: 635 to 186 on GC880, 274 to 270 on GC2000 and no change on GC400(GCnano). Fixes:8dd26fa2f0("etnaviv: support GL_ARB_seamless_cubemap_per_texture") Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: Marek Vasut <marex@denx.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4865> (cherry picked from commit2b535ac61b)
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8b409a429f
commit
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4 changed files with 11 additions and 4 deletions
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@ -112,7 +112,7 @@
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"description": "etnaviv: Disable seamless cube map on GC880",
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"nominated": true,
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"nomination_type": 1,
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"resolution": 0,
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"resolution": 1,
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"master_sha": null,
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"because_sha": "8dd26fa2f065e78f3204357d8b474656b9ea81db"
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},
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@ -91,6 +91,8 @@ struct etna_specs {
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unsigned use_blt : 1;
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/* can use any kind of wrapping mode on npot textures */
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unsigned npot_tex_any_wrap : 1;
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/* supports seamless cube map */
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unsigned seamless_cube_map : 1;
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/* number of bits per TS tile */
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unsigned bits_per_tile;
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/* clear value for TS (dependent on bits_per_tile) */
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@ -220,7 +220,7 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
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case PIPE_CAP_MAX_TEXEL_OFFSET:
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return 7;
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case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
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return VIV_FEATURE(screen, chipMinorFeatures2, SEAMLESS_CUBE_MAP);
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return screen->specs.seamless_cube_map;
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/* Timer queries. */
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case PIPE_CAP_OCCLUSION_QUERY:
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@ -763,6 +763,9 @@ etna_get_specs(struct etna_screen *screen)
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VIV_FEATURE(screen, chipMinorFeatures4, HALTI2);
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screen->specs.v4_compression =
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VIV_FEATURE(screen, chipMinorFeatures6, V4_COMPRESSION);
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screen->specs.seamless_cube_map =
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(screen->model != 0x880) && /* Seamless cubemap is broken on GC880? */
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VIV_FEATURE(screen, chipMinorFeatures2, SEAMLESS_CUBE_MAP);
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if (screen->specs.halti >= 5) {
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/* GC7000 - this core must load shaders from memory. */
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@ -86,6 +86,8 @@ etna_create_sampler_state_state(struct pipe_context *pipe,
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const struct pipe_sampler_state *ss)
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{
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struct etna_sampler_state *cs = CALLOC_STRUCT(etna_sampler_state);
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struct etna_context *ctx = etna_context(pipe);
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struct etna_screen *screen = ctx->screen;
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const bool ansio = ss->max_anisotropy > 1;
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if (!cs)
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@ -105,8 +107,8 @@ etna_create_sampler_state_state(struct pipe_context *pipe,
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cs->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_ROUND_UV;
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}
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cs->TE_SAMPLER_CONFIG1 =
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COND(ss->seamless_cube_map, VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP);
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cs->TE_SAMPLER_CONFIG1 = screen->specs.seamless_cube_map ?
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COND(ss->seamless_cube_map, VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP) : 0;
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cs->TE_SAMPLER_LOD_CONFIG =
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COND(ss->lod_bias != 0.0, VIVS_TE_SAMPLER_LOD_CONFIG_BIAS_ENABLE) |
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