etnaviv: Disable seamless cube map on GC880

The GC880 on iMX6DL indicates in it's minorFeatures2 register that it
does support SEAMLESS_CUBE_MAP, however when the TE.SAMPLER_CONFIG1
VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP bit is set on GC880 on iMX6DL,
the result is corrupted image. In particular, the following ~112 dEQPs
are affected and fail:

  dEQP-GLES2.functional.texture.filtering.cube.*

This only happens on MX6DL GC880, MX6Q GC2000 and STM32MP1 GC400(GCnano)
do not report the minorFeatures2 SEAMLESS_CUBE_MAP bit and ignore the
TE_SAMPLER_CONFIG1 VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP bit (note
that ss->seamless_cube_map is unconditionally set by mesa at times even
PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE returns 0), so there is no visible
problem and there are no failing dEQP tests on the GC2000 and GCnano.

This might imply that the minorFeatures2 SEAMLESS_CUBE_MAP has some
different meaning on GC880 or the SEAMLESS_CUBE_MAP behaves differently
on the GC880.

This patch does not set the SEAMLESS_CUBE_MAP bit on hardware which does
not indicate support for seamless cube map and on GC880, which results
in reduction in failed dEQPs: 635 to 186 on GC880, 274 to 270 on GC2000
and no change on GC400(GCnano).

Fixes: 8dd26fa2f0 ("etnaviv: support GL_ARB_seamless_cubemap_per_texture")
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4865>
(cherry picked from commit 2b535ac61b)
This commit is contained in:
Marek Vasut 2020-05-02 22:24:25 +02:00 committed by Eric Engestrom
parent 8b409a429f
commit 97e2965b07
4 changed files with 11 additions and 4 deletions

View file

@ -112,7 +112,7 @@
"description": "etnaviv: Disable seamless cube map on GC880",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"master_sha": null,
"because_sha": "8dd26fa2f065e78f3204357d8b474656b9ea81db"
},

View file

@ -91,6 +91,8 @@ struct etna_specs {
unsigned use_blt : 1;
/* can use any kind of wrapping mode on npot textures */
unsigned npot_tex_any_wrap : 1;
/* supports seamless cube map */
unsigned seamless_cube_map : 1;
/* number of bits per TS tile */
unsigned bits_per_tile;
/* clear value for TS (dependent on bits_per_tile) */

View file

@ -220,7 +220,7 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_MAX_TEXEL_OFFSET:
return 7;
case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
return VIV_FEATURE(screen, chipMinorFeatures2, SEAMLESS_CUBE_MAP);
return screen->specs.seamless_cube_map;
/* Timer queries. */
case PIPE_CAP_OCCLUSION_QUERY:
@ -763,6 +763,9 @@ etna_get_specs(struct etna_screen *screen)
VIV_FEATURE(screen, chipMinorFeatures4, HALTI2);
screen->specs.v4_compression =
VIV_FEATURE(screen, chipMinorFeatures6, V4_COMPRESSION);
screen->specs.seamless_cube_map =
(screen->model != 0x880) && /* Seamless cubemap is broken on GC880? */
VIV_FEATURE(screen, chipMinorFeatures2, SEAMLESS_CUBE_MAP);
if (screen->specs.halti >= 5) {
/* GC7000 - this core must load shaders from memory. */

View file

@ -86,6 +86,8 @@ etna_create_sampler_state_state(struct pipe_context *pipe,
const struct pipe_sampler_state *ss)
{
struct etna_sampler_state *cs = CALLOC_STRUCT(etna_sampler_state);
struct etna_context *ctx = etna_context(pipe);
struct etna_screen *screen = ctx->screen;
const bool ansio = ss->max_anisotropy > 1;
if (!cs)
@ -105,8 +107,8 @@ etna_create_sampler_state_state(struct pipe_context *pipe,
cs->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_ROUND_UV;
}
cs->TE_SAMPLER_CONFIG1 =
COND(ss->seamless_cube_map, VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP);
cs->TE_SAMPLER_CONFIG1 = screen->specs.seamless_cube_map ?
COND(ss->seamless_cube_map, VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP) : 0;
cs->TE_SAMPLER_LOD_CONFIG =
COND(ss->lod_bias != 0.0, VIVS_TE_SAMPLER_LOD_CONFIG_BIAS_ENABLE) |