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pan/bi: Run nir_lower_all_phis_to_scalar() late
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We were running this in the preprocess step and then trusting that it
would clean up everything before we got to the back-end.  However, we
were running the entire optimization loop in between as well as drivers
potentially adding stuff (since panvk has it's own passes after
postprocess).  Instead, this should be one of the last things run, right
before we go into the back-end.

Cc: mesa-stable
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38821>
(cherry picked from commit 2bd282a968)

Conflicts:
	src/panfrost/compiler/bifrost_compile.c
This commit is contained in:
Faith Ekstrand 2025-11-17 15:06:04 -05:00 • committed by Dylan Baker
parent 366a2272d3
commit 9741b852cd
2 changed files with 12 additions and 2 deletions
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2
.pick_status.json
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@ -834,7 +834,7 @@
"description": "pan/bi: Run nir_lower_all_phis_to_scalar() late", "description": "pan/bi: Run nir_lower_all_phis_to_scalar() late",
"nominated": true, "nominated": true,
"nomination_type": 1, "nomination_type": 1,
"resolution": 0, "resolution": 1,
"main_sha": null, "main_sha": null,
"because_sha": null, "because_sha": null,
"notes": null "notes": null

12
src/panfrost/compiler/bifrost_compile.c
View file

@ -6083,7 +6083,6 @@ bifrost_postprocess_nir(nir_shader *nir, unsigned gpu_id)
NIR_PASS(_, nir, nir_lower_alu_width, bi_vectorize_filter, &gpu_id); NIR_PASS(_, nir, nir_lower_alu_width, bi_vectorize_filter, &gpu_id);
NIR_PASS(_, nir, nir_lower_load_const_to_scalar); NIR_PASS(_, nir, nir_lower_load_const_to_scalar);
NIR_PASS(_, nir, nir_lower_all_phis_to_scalar);
NIR_PASS(_, nir, nir_lower_flrp, 16 | 32 | 64, false /* always_precise */); NIR_PASS(_, nir, nir_lower_flrp, 16 | 32 | 64, false /* always_precise */);
NIR_PASS(_, nir, nir_lower_var_copies); NIR_PASS(_, nir, nir_lower_var_copies);
NIR_PASS(_, nir, nir_lower_alu); NIR_PASS(_, nir, nir_lower_alu);
@ -6587,6 +6586,17 @@ bifrost_compile_shader_nir(nir_shader *nir,
bi_optimize_nir(nir, inputs->gpu_id, inputs->robust2_modes); bi_optimize_nir(nir, inputs->gpu_id, inputs->robust2_modes);
{
bool scalar_phis_pass = false;
unsigned gpu_id = inputs->gpu_id;
NIR_PASS(scalar_phis_pass, nir, nir_lower_phis_to_scalar,
bi_vectorize_filter, &gpu_id);
if (scalar_phis_pass) {
NIR_PASS(_, nir, nir_copy_prop);
NIR_PASS(_, nir, nir_opt_dce);
}
}
info->tls_size = nir->scratch_size; info->tls_size = nir->scratch_size;
pan_nir_collect_varyings(nir, info, PAN_MEDIUMP_VARY_32BIT); pan_nir_collect_varyings(nir, info, PAN_MEDIUMP_VARY_32BIT);