From 9741b852cd7baa8241cc421e5e5679d8e5ec729a Mon Sep 17 00:00:00 2001 From: Faith Ekstrand Date: Mon, 17 Nov 2025 15:06:04 -0500 Subject: [PATCH] pan/bi: Run nir_lower_all_phis_to_scalar() late We were running this in the preprocess step and then trusting that it would clean up everything before we got to the back-end. However, we were running the entire optimization loop in between as well as drivers potentially adding stuff (since panvk has it's own passes after postprocess). Instead, this should be one of the last things run, right before we go into the back-end. Cc: mesa-stable Reviewed-by: Christoph Pillmayer Acked-by: Eric R. Smith Part-of: (cherry picked from commit 2bd282a9680f6a53bff70f54e60b1c10aefce97a) Conflicts: src/panfrost/compiler/bifrost_compile.c --- .pick_status.json | 2 +- src/panfrost/compiler/bifrost_compile.c | 12 +++++++++++- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 17937b1f22c..7fc56db986f 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -834,7 +834,7 @@ "description": "pan/bi: Run nir_lower_all_phis_to_scalar() late", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/panfrost/compiler/bifrost_compile.c b/src/panfrost/compiler/bifrost_compile.c index 98a33b3784d..cdf7cc33522 100644 --- a/src/panfrost/compiler/bifrost_compile.c +++ b/src/panfrost/compiler/bifrost_compile.c @@ -6083,7 +6083,6 @@ bifrost_postprocess_nir(nir_shader *nir, unsigned gpu_id) NIR_PASS(_, nir, nir_lower_alu_width, bi_vectorize_filter, &gpu_id); NIR_PASS(_, nir, nir_lower_load_const_to_scalar); - NIR_PASS(_, nir, nir_lower_all_phis_to_scalar); NIR_PASS(_, nir, nir_lower_flrp, 16 | 32 | 64, false /* always_precise */); NIR_PASS(_, nir, nir_lower_var_copies); NIR_PASS(_, nir, nir_lower_alu); @@ -6587,6 +6586,17 @@ bifrost_compile_shader_nir(nir_shader *nir, bi_optimize_nir(nir, inputs->gpu_id, inputs->robust2_modes); + { + bool scalar_phis_pass = false; + unsigned gpu_id = inputs->gpu_id; + NIR_PASS(scalar_phis_pass, nir, nir_lower_phis_to_scalar, + bi_vectorize_filter, &gpu_id); + if (scalar_phis_pass) { + NIR_PASS(_, nir, nir_copy_prop); + NIR_PASS(_, nir, nir_opt_dce); + } + } + info->tls_size = nir->scratch_size; pan_nir_collect_varyings(nir, info, PAN_MEDIUMP_VARY_32BIT);