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intel/isl: Assert alignments of surface addresses
In the import paths in iris, there are several cases where surface VMAs are created without relying on the calculated surface alignment. Asserting the alignments of surface addresses, should help catch any cases where we end up with the wrong alignment. This found a couple issues during development. One which required a change to existing code is that when creating uncompressed surfaces from compressed ones, ISL will sometimes increase the image alignment as a result of the new format supporting CCS. This patch adds the usage flag to disable that behavior. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29094>
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4 changed files with 20 additions and 2 deletions
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@ -4057,11 +4057,22 @@ isl_surf_get_uncompressed_surf(const struct isl_device *dev,
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x_offset_el,
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x_offset_el,
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y_offset_el);
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y_offset_el);
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isl_surf_usage_flags_t usage = surf->usage;
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/* Even for cube maps there will be only single face, therefore drop
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/* Even for cube maps there will be only single face, therefore drop
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* the corresponding flag if present.
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* the corresponding flag if present.
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*/
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*/
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const isl_surf_usage_flags_t usage =
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usage &= ~ISL_SURF_USAGE_CUBE_BIT;
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surf->usage & (~ISL_SURF_USAGE_CUBE_BIT);
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/* CCS-enabled surfaces can have different layout requirements than
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* surfaces without CCS support. So, for accuracy, disable CCS
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* support if the original surface lacked it.
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*/
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if (_isl_surf_info_supports_ccs(dev, surf->format, surf->usage) !=
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_isl_surf_info_supports_ccs(dev, view_format, usage)) {
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assert(_isl_surf_info_supports_ccs(dev, view_format, usage));
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usage |= ISL_SURF_USAGE_DISABLE_AUX_BIT;
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}
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bool ok UNUSED;
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bool ok UNUSED;
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ok = isl_surf_init(dev, ucompr_surf,
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ok = isl_surf_init(dev, ucompr_surf,
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@ -100,6 +100,8 @@ isl_genX(emit_cpb_control_s)(const struct isl_device *dev, void *batch,
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cpb.MOCS = info->mocs;
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cpb.MOCS = info->mocs;
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cpb.SurfaceQPitch = isl_surf_get_array_pitch_sa_rows(info->surf) >> 2;
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cpb.SurfaceQPitch = isl_surf_get_array_pitch_sa_rows(info->surf) >> 2;
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cpb.TiledMode = isl_encode_tiling[info->surf->tiling];
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cpb.TiledMode = isl_encode_tiling[info->surf->tiling];
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assert(info->address % info->surf->alignment_B == 0);
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cpb.SurfaceBaseAddress = info->address;
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cpb.SurfaceBaseAddress = info->address;
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cpb.MipTailStartLOD = info->surf->miptail_start_level;
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cpb.MipTailStartLOD = info->surf->miptail_start_level;
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@ -167,6 +167,7 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
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#if GFX_VER >= 7
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#if GFX_VER >= 7
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db.DepthWriteEnable = true;
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db.DepthWriteEnable = true;
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#endif
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#endif
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assert(info->depth_address % info->depth_surf->alignment_B == 0);
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db.SurfaceBaseAddress = info->depth_address;
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db.SurfaceBaseAddress = info->depth_address;
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#if GFX_VERx10 >= 125
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#if GFX_VERx10 >= 125
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@ -269,6 +270,7 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
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#elif GFX_VERx10 >= 75
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#elif GFX_VERx10 >= 75
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sb.StencilBufferEnable = true;
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sb.StencilBufferEnable = true;
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#endif
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#endif
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assert(info->stencil_address % info->stencil_surf->alignment_B == 0);
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sb.SurfaceBaseAddress = info->stencil_address;
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sb.SurfaceBaseAddress = info->stencil_address;
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sb.SurfacePitch = info->stencil_surf->row_pitch_B - 1;
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sb.SurfacePitch = info->stencil_surf->row_pitch_B - 1;
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#if GFX_VER >= 8
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#if GFX_VER >= 8
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@ -310,6 +312,7 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
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assert(GFX_VER >= 12 || info->hiz_usage == ISL_AUX_USAGE_HIZ);
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assert(GFX_VER >= 12 || info->hiz_usage == ISL_AUX_USAGE_HIZ);
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db.HierarchicalDepthBufferEnable = true;
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db.HierarchicalDepthBufferEnable = true;
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assert(info->hiz_address % info->hiz_surf->alignment_B == 0);
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hiz.SurfaceBaseAddress = info->hiz_address;
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hiz.SurfaceBaseAddress = info->hiz_address;
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hiz.SurfacePitch = info->hiz_surf->row_pitch_B - 1;
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hiz.SurfacePitch = info->hiz_surf->row_pitch_B - 1;
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@ -611,6 +611,7 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
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assert(isl_swizzle_is_identity(info->view->swizzle));
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assert(isl_swizzle_is_identity(info->view->swizzle));
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#endif
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#endif
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assert(info->address % info->surf->alignment_B == 0);
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s.SurfaceBaseAddress = info->address;
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s.SurfaceBaseAddress = info->address;
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#if GFX_VER >= 6
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#if GFX_VER >= 6
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@ -824,6 +825,7 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
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uint32_t pitch_in_tiles =
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uint32_t pitch_in_tiles =
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info->aux_surf->row_pitch_B / tile_info.phys_extent_B.width;
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info->aux_surf->row_pitch_B / tile_info.phys_extent_B.width;
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assert(info->aux_address % info->aux_surf->alignment_B == 0);
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s.AuxiliarySurfaceBaseAddress = info->aux_address;
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s.AuxiliarySurfaceBaseAddress = info->aux_address;
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s.AuxiliarySurfacePitch = pitch_in_tiles - 1;
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s.AuxiliarySurfacePitch = pitch_in_tiles - 1;
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