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freedreno/a6xx: Fix VS primid with tess + GS.

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Analogous to the previous commit.

Fixes: 8115cde3ba ("tu, freedreno/a6xx, ir3: Rewrite tess PrimID handling")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12768>
This commit is contained in:
Connor Abbott 2021-09-08 15:05:20 +02:00 • committed by Marge Bot
parent f254686b13
commit 8e188f8f2e
1 changed files with 3 additions and 3 deletions
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6
src/gallium/drivers/freedreno/a6xx/fd6_program.c
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@ -364,10 +364,10 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd_context *ctx,
layer_regid = ir3_find_output_regid(vs, VARYING_SLOT_LAYER);
vertex_regid = ir3_find_sysval_regid(vs, SYSTEM_VALUE_VERTEX_ID);
instance_regid = ir3_find_sysval_regid(vs, SYSTEM_VALUE_INSTANCE_ID);
if (gs)
vs_primitive_regid = ir3_find_sysval_regid(gs, SYSTEM_VALUE_PRIMITIVE_ID);
else if (hs)
if (hs)
vs_primitive_regid = ir3_find_sysval_regid(hs, SYSTEM_VALUE_PRIMITIVE_ID);
else if (gs)
vs_primitive_regid = ir3_find_sysval_regid(gs, SYSTEM_VALUE_PRIMITIVE_ID);
else
vs_primitive_regid = regid(63, 0);