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brw: Make max_push_bytes a parameter to URB lowering data

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This allows us to program something other than a stage-based constant.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38990>
This commit is contained in:
Kenneth Graunke 2025-12-12 02:35:26 -08:00 • committed by Marge Bot
parent f62f7d80e2
commit 8889802271
2 changed files with 5 additions and 6 deletions
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8
src/intel/compiler/brw/brw_nir.c
View file

@ -354,12 +354,7 @@ try_load_push_input(nir_builder *b,
offset_unit * nir_src_as_uint(nir_src_for_ssa(offset));
assert((byte_offset % 4) == 0);
const enum mesa_shader_stage stage = b->shader->info.stage;
static const unsigned max_push_bytes[MESA_SHADER_MESH + 1] = {
[MESA_SHADER_TESS_EVAL] = 32 * 16 /* 32 vec4s */
};
if (byte_offset >= max_push_bytes[stage])
if (byte_offset >= cb_data->max_push_bytes)
return NULL;
return load_push_input(b, io, byte_offset);
@ -978,6 +973,7 @@ brw_nir_lower_tes_inputs(nir_shader *nir,
const struct brw_lower_urb_cb_data cb_data = {
.devinfo = devinfo,
.vec4_access = true,
.max_push_bytes = 32 * 16, /* 32 vec4s */
.varying_to_slot = vue_map->varying_to_slot,
.per_vertex_stride = vue_map->num_per_vertex_slots * 16,
.dynamic_tes = vue_map->layout == INTEL_VUE_LAYOUT_SEPARATE,

3
src/intel/compiler/brw/brw_nir.h
View file

@ -186,6 +186,9 @@ void brw_nir_lower_fs_barycentrics(nir_shader *shader);
struct brw_lower_urb_cb_data {
const struct intel_device_info *devinfo;
/** Maximum amount of pushed data in bytes */
unsigned max_push_bytes;
/* If true, all access is guaranteed to be vec4 (128-bit) aligned.
* offset and base are in units of 128-bit vec4 slots.
*