intel/fs/xe2+: Pass correct dispatch_width to fs_generator for geometry-processing stages.

Instead of hard-coding a dispatch_width value which is no longer
correct on Xe2+.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26605>
This commit is contained in:
Ian Romanick 2022-08-09 15:52:40 -07:00 committed by Caio Oliveira
parent 3f92dde55e
commit 84b53e1a54
4 changed files with 4 additions and 4 deletions

View file

@ -1390,7 +1390,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
nir->info.name));
}
g.generate_code(v.cfg, 8, v.shader_stats,
g.generate_code(v.cfg, dispatch_width, v.shader_stats,
v.performance_analysis.require(), params->base.stats);
g.add_const_data(nir->constant_data, nir->constant_data_size);

View file

@ -2677,7 +2677,7 @@ brw_compile_vs(const struct brw_compiler *compiler,
g.enable_debug(debug_name);
}
g.generate_code(v.cfg, 8, v.shader_stats,
g.generate_code(v.cfg, dispatch_width, v.shader_stats,
v.performance_analysis.require(), params->base.stats);
g.add_const_data(nir->constant_data, nir->constant_data_size);
assembly = g.get_assembly();

View file

@ -838,7 +838,7 @@ brw_compile_gs(const struct brw_compiler *compiler,
label, nir->info.name);
g.enable_debug(name);
}
g.generate_code(v.cfg, 8, v.shader_stats,
g.generate_code(v.cfg, v.dispatch_width, v.shader_stats,
v.performance_analysis.require(), params->base.stats);
g.add_const_data(nir->constant_data, nir->constant_data_size);
return g.get_assembly();

View file

@ -470,7 +470,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
nir->info.name));
}
g.generate_code(v.cfg, 8, v.shader_stats,
g.generate_code(v.cfg, dispatch_width, v.shader_stats,
v.performance_analysis.require(), params->base.stats);
g.add_const_data(nir->constant_data, nir->constant_data_size);