mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-07 09:18:04 +02:00
anv: Move init and finish of state pools to its own functions
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41035>
This commit is contained in:
José Roberto de Souza
Marge Bot
parent
a4c22baeb4
commit
83d75a0384
1 changed files with 226 additions and 203 deletions
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@ -450,6 +450,229 @@ anv_device_finish_vma_heaps(struct anv_device *device)
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pthread_mutex_destroy(&device->vma_mutex);
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}
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static VkResult
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anv_state_pools_init(struct anv_device *device)
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{
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VkResult result;
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/* Because scratch is also relative to General State Base Address, we leave
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* the base address 0 and start the pool memory at an offset. This way we
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* get the correct offsets in the anv_states that get allocated from it.
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*/
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result = anv_state_pool_init(&device->general_state_pool, device,
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&(struct anv_state_pool_params) {
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.name = "general pool",
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.base_address = 0,
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.start_offset = device->physical->va.general_state_pool.addr,
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.block_size = 16384,
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.max_size = device->physical->va.general_state_pool.size
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});
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if (result != VK_SUCCESS)
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goto fail_batch_bo_pool;
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result = anv_state_pool_init(&device->dynamic_state_pool, device,
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&(struct anv_state_pool_params) {
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.name = "dynamic pool",
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.base_address = device->physical->va.dynamic_state_pool.addr,
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.block_size = 16384,
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.max_size = device->physical->va.dynamic_state_pool.size,
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});
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if (result != VK_SUCCESS)
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goto fail_general_state_pool;
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/* The border color pointer is limited to 24 bits, so we need to make
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* sure that any such color used at any point in the program doesn't
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* exceed that limit.
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* We achieve that by reserving all the custom border colors we support
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* right off the bat, so they are close to the base address.
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*/
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result = anv_state_reserved_array_pool_init(&device->custom_border_colors,
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&device->dynamic_state_pool,
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MAX_CUSTOM_BORDER_COLORS,
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sizeof(struct gfx8_border_color), 64);
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if (result != VK_SUCCESS)
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goto fail_dynamic_state_pool;
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result = anv_shader_heap_init(&device->shader_heap, device,
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device->physical->va.shader_heap,
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21 /* 2MiB */, 27 /* 64MiB */);
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if (result != VK_SUCCESS)
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goto fail_custom_border_color_pool;
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if (device->info->verx10 >= 125) {
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/* Put the scratch surface states at the beginning of the internal
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* surface state pool.
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*/
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result = anv_state_pool_init(&device->scratch_surface_state_pool, device,
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&(struct anv_state_pool_params) {
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.name = "scratch surface state pool",
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.base_address = device->physical->va.scratch_surface_state_pool.addr,
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.block_size = 4096,
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.max_size = device->physical->va.scratch_surface_state_pool.size,
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});
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if (result != VK_SUCCESS)
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goto fail_shader_vma_heap;
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result = anv_state_pool_init(&device->internal_surface_state_pool, device,
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&(struct anv_state_pool_params) {
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.name = "internal surface state pool",
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.base_address = device->physical->va.internal_surface_state_pool.addr,
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.start_offset = device->physical->va.scratch_surface_state_pool.size,
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.block_size = 4096,
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.max_size = device->physical->va.internal_surface_state_pool.size,
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});
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} else {
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result = anv_state_pool_init(&device->internal_surface_state_pool, device,
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&(struct anv_state_pool_params) {
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.name = "internal surface state pool",
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.base_address = device->physical->va.internal_surface_state_pool.addr,
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.block_size = 4096,
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.max_size = device->physical->va.internal_surface_state_pool.size,
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});
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}
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if (result != VK_SUCCESS)
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goto fail_scratch_surface_state_pool;
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if (device->physical->indirect_descriptors) {
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result = anv_state_pool_init(&device->bindless_surface_state_pool, device,
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&(struct anv_state_pool_params) {
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.name = "bindless surface state pool",
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.base_address = device->physical->va.bindless_surface_state_pool.addr,
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.block_size = 4096,
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.max_size = device->physical->va.bindless_surface_state_pool.size,
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});
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if (result != VK_SUCCESS)
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goto fail_internal_surface_state_pool;
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}
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if (device->info->verx10 >= 125) {
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/* We're using 3DSTATE_BINDING_TABLE_POOL_ALLOC to give the binding
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* table its own base address separately from surface state base.
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*/
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result = anv_state_pool_init(&device->binding_table_pool, device,
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&(struct anv_state_pool_params) {
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.name = "binding table pool",
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.base_address = device->physical->va.binding_table_pool.addr,
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.block_size = device->physical->instance->binding_table_block_size,
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.max_size = device->physical->va.binding_table_pool.size,
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});
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} else {
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/* The binding table should be in front of the surface states in virtual
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* address space so that all surface states can be express as relative
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* offsets from the binding table location.
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*/
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assert(device->physical->va.binding_table_pool.addr <
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device->physical->va.internal_surface_state_pool.addr);
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int64_t bt_pool_offset = (int64_t)device->physical->va.binding_table_pool.addr -
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(int64_t)device->physical->va.internal_surface_state_pool.addr;
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assert(INT32_MIN < bt_pool_offset && bt_pool_offset < 0);
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result = anv_state_pool_init(&device->binding_table_pool, device,
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&(struct anv_state_pool_params) {
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.name = "binding table pool",
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.base_address = device->physical->va.internal_surface_state_pool.addr,
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.start_offset = bt_pool_offset,
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.block_size = 64 * 1024,
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.max_size = device->physical->va.internal_surface_state_pool.size,
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});
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}
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if (result != VK_SUCCESS)
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goto fail_bindless_surface_state_pool;
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if (device->physical->indirect_descriptors) {
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result = anv_state_pool_init(&device->indirect_push_descriptor_pool, device,
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&(struct anv_state_pool_params) {
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.name = "indirect push descriptor pool",
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.base_address = device->physical->va.indirect_push_descriptor_pool.addr,
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.block_size = 4096,
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.max_size = device->physical->va.indirect_push_descriptor_pool.size,
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});
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if (result != VK_SUCCESS)
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goto fail_binding_table_pool;
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}
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if (device->vk.enabled_extensions.EXT_descriptor_buffer &&
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device->info->verx10 >= 125) {
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/* On Gfx12.5+ because of the bindless stages (Mesh, Task, RT), the only
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* way we can wire push descriptors is through the bindless heap. This
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* state pool is a 1Gb carve out of the 4Gb HW heap.
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*/
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result = anv_state_pool_init(&device->push_descriptor_buffer_pool, device,
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&(struct anv_state_pool_params) {
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.name = "push descriptor buffer state pool",
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.base_address = device->physical->va.push_descriptor_buffer_pool.addr,
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.block_size = 4096,
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.max_size = device->physical->va.push_descriptor_buffer_pool.size,
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});
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if (result != VK_SUCCESS)
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goto fail_indirect_push_descriptor_pool;
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}
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if (device->info->has_aux_map) {
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result = anv_state_pool_init(&device->aux_tt_pool, device,
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&(struct anv_state_pool_params) {
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.name = "aux-tt pool",
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.base_address = device->physical->va.aux_tt_pool.addr,
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.block_size = 16384,
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.max_size = device->physical->va.aux_tt_pool.size,
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});
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if (result != VK_SUCCESS)
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goto fail_push_descriptor_buffer_pool;
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}
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return result;
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fail_push_descriptor_buffer_pool:
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if (device->vk.enabled_extensions.EXT_descriptor_buffer &&
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device->info->verx10 >= 125)
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anv_state_pool_finish(&device->push_descriptor_buffer_pool);
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fail_indirect_push_descriptor_pool:
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if (device->physical->indirect_descriptors)
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anv_state_pool_finish(&device->indirect_push_descriptor_pool);
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fail_binding_table_pool:
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anv_state_pool_finish(&device->binding_table_pool);
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fail_bindless_surface_state_pool:
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if (device->physical->indirect_descriptors)
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anv_state_pool_finish(&device->bindless_surface_state_pool);
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fail_internal_surface_state_pool:
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anv_state_pool_finish(&device->internal_surface_state_pool);
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fail_scratch_surface_state_pool:
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if (device->info->verx10 >= 125)
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anv_state_pool_finish(&device->scratch_surface_state_pool);
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fail_shader_vma_heap:
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anv_shader_heap_finish(&device->shader_heap);
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fail_custom_border_color_pool:
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anv_state_reserved_array_pool_finish(&device->custom_border_colors);
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fail_dynamic_state_pool:
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anv_state_pool_finish(&device->dynamic_state_pool);
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fail_general_state_pool:
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anv_state_pool_finish(&device->general_state_pool);
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fail_batch_bo_pool:
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return result;
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}
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static void
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anv_state_pools_finish(struct anv_device *device)
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{
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anv_state_reserved_array_pool_finish(&device->custom_border_colors);
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if (device->info->has_aux_map)
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anv_state_pool_finish(&device->aux_tt_pool);
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if (device->vk.enabled_extensions.EXT_descriptor_buffer &&
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device->info->verx10 >= 125)
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anv_state_pool_finish(&device->push_descriptor_buffer_pool);
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if (device->physical->indirect_descriptors)
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anv_state_pool_finish(&device->indirect_push_descriptor_pool);
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anv_state_pool_finish(&device->binding_table_pool);
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if (device->info->verx10 >= 125)
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anv_state_pool_finish(&device->scratch_surface_state_pool);
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anv_state_pool_finish(&device->internal_surface_state_pool);
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if (device->physical->indirect_descriptors)
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anv_state_pool_finish(&device->bindless_surface_state_pool);
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anv_shader_heap_finish(&device->shader_heap);
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anv_state_pool_finish(&device->dynamic_state_pool);
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anv_state_pool_finish(&device->general_state_pool);
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}
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VkResult anv_CreateDevice(
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VkPhysicalDevice physicalDevice,
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const VkDeviceCreateInfo* pCreateInfo,
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@ -637,169 +860,11 @@ VkResult anv_CreateDevice(
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0 /* alloc_flags */);
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}
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/* Because scratch is also relative to General State Base Address, we leave
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* the base address 0 and start the pool memory at an offset. This way we
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* get the correct offsets in the anv_states that get allocated from it.
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*/
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result = anv_state_pool_init(&device->general_state_pool, device,
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&(struct anv_state_pool_params) {
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.name = "general pool",
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.base_address = 0,
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.start_offset = device->physical->va.general_state_pool.addr,
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.block_size = 16384,
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.max_size = device->physical->va.general_state_pool.size
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});
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result = anv_state_pools_init(device);
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if (result != VK_SUCCESS)
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goto fail_batch_bo_pool;
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result = anv_state_pool_init(&device->dynamic_state_pool, device,
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&(struct anv_state_pool_params) {
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.name = "dynamic pool",
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.base_address = device->physical->va.dynamic_state_pool.addr,
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.block_size = 16384,
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.max_size = device->physical->va.dynamic_state_pool.size,
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});
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if (result != VK_SUCCESS)
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goto fail_general_state_pool;
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/* The border color pointer is limited to 24 bits, so we need to make
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* sure that any such color used at any point in the program doesn't
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* exceed that limit.
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* We achieve that by reserving all the custom border colors we support
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* right off the bat, so they are close to the base address.
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*/
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result = anv_state_reserved_array_pool_init(&device->custom_border_colors,
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&device->dynamic_state_pool,
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MAX_CUSTOM_BORDER_COLORS,
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sizeof(struct gfx8_border_color), 64);
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if (result != VK_SUCCESS)
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goto fail_dynamic_state_pool;
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result = anv_shader_heap_init(&device->shader_heap, device,
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device->physical->va.shader_heap,
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21 /* 2MiB */, 27 /* 64MiB */);
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if (result != VK_SUCCESS)
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goto fail_custom_border_color_pool;
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if (device->info->verx10 >= 125) {
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/* Put the scratch surface states at the beginning of the internal
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* surface state pool.
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*/
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result = anv_state_pool_init(&device->scratch_surface_state_pool, device,
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&(struct anv_state_pool_params) {
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.name = "scratch surface state pool",
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.base_address = device->physical->va.scratch_surface_state_pool.addr,
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.block_size = 4096,
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.max_size = device->physical->va.scratch_surface_state_pool.size,
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});
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if (result != VK_SUCCESS)
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goto fail_shader_vma_heap;
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result = anv_state_pool_init(&device->internal_surface_state_pool, device,
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&(struct anv_state_pool_params) {
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.name = "internal surface state pool",
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.base_address = device->physical->va.internal_surface_state_pool.addr,
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.start_offset = device->physical->va.scratch_surface_state_pool.size,
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.block_size = 4096,
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.max_size = device->physical->va.internal_surface_state_pool.size,
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});
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} else {
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result = anv_state_pool_init(&device->internal_surface_state_pool, device,
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&(struct anv_state_pool_params) {
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.name = "internal surface state pool",
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.base_address = device->physical->va.internal_surface_state_pool.addr,
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.block_size = 4096,
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.max_size = device->physical->va.internal_surface_state_pool.size,
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});
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}
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if (result != VK_SUCCESS)
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goto fail_scratch_surface_state_pool;
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if (device->physical->indirect_descriptors) {
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result = anv_state_pool_init(&device->bindless_surface_state_pool, device,
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&(struct anv_state_pool_params) {
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.name = "bindless surface state pool",
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.base_address = device->physical->va.bindless_surface_state_pool.addr,
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.block_size = 4096,
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.max_size = device->physical->va.bindless_surface_state_pool.size,
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});
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if (result != VK_SUCCESS)
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goto fail_internal_surface_state_pool;
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}
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if (device->info->verx10 >= 125) {
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/* We're using 3DSTATE_BINDING_TABLE_POOL_ALLOC to give the binding
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* table its own base address separately from surface state base.
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*/
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result = anv_state_pool_init(&device->binding_table_pool, device,
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&(struct anv_state_pool_params) {
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.name = "binding table pool",
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.base_address = device->physical->va.binding_table_pool.addr,
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.block_size = device->physical->instance->binding_table_block_size,
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.max_size = device->physical->va.binding_table_pool.size,
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});
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} else {
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/* The binding table should be in front of the surface states in virtual
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* address space so that all surface states can be express as relative
|
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* offsets from the binding table location.
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*/
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assert(device->physical->va.binding_table_pool.addr <
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device->physical->va.internal_surface_state_pool.addr);
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int64_t bt_pool_offset = (int64_t)device->physical->va.binding_table_pool.addr -
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(int64_t)device->physical->va.internal_surface_state_pool.addr;
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assert(INT32_MIN < bt_pool_offset && bt_pool_offset < 0);
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result = anv_state_pool_init(&device->binding_table_pool, device,
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&(struct anv_state_pool_params) {
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.name = "binding table pool",
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.base_address = device->physical->va.internal_surface_state_pool.addr,
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.start_offset = bt_pool_offset,
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.block_size = 64 * 1024,
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.max_size = device->physical->va.internal_surface_state_pool.size,
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});
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}
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if (result != VK_SUCCESS)
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goto fail_bindless_surface_state_pool;
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if (device->physical->indirect_descriptors) {
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result = anv_state_pool_init(&device->indirect_push_descriptor_pool, device,
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&(struct anv_state_pool_params) {
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.name = "indirect push descriptor pool",
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.base_address = device->physical->va.indirect_push_descriptor_pool.addr,
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.block_size = 4096,
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.max_size = device->physical->va.indirect_push_descriptor_pool.size,
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});
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if (result != VK_SUCCESS)
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goto fail_binding_table_pool;
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}
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if (device->vk.enabled_extensions.EXT_descriptor_buffer &&
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device->info->verx10 >= 125) {
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/* On Gfx12.5+ because of the bindless stages (Mesh, Task, RT), the only
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* way we can wire push descriptors is through the bindless heap. This
|
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* state pool is a 1Gb carve out of the 4Gb HW heap.
|
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*/
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result = anv_state_pool_init(&device->push_descriptor_buffer_pool, device,
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&(struct anv_state_pool_params) {
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.name = "push descriptor buffer state pool",
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.base_address = device->physical->va.push_descriptor_buffer_pool.addr,
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.block_size = 4096,
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.max_size = device->physical->va.push_descriptor_buffer_pool.size,
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});
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if (result != VK_SUCCESS)
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goto fail_indirect_push_descriptor_pool;
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}
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if (device->info->has_aux_map) {
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result = anv_state_pool_init(&device->aux_tt_pool, device,
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&(struct anv_state_pool_params) {
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.name = "aux-tt pool",
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.base_address = device->physical->va.aux_tt_pool.addr,
|
||||
.block_size = 16384,
|
||||
.max_size = device->physical->va.aux_tt_pool.size,
|
||||
});
|
||||
if (result != VK_SUCCESS)
|
||||
goto fail_push_descriptor_buffer_pool;
|
||||
|
||||
device->aux_map_ctx = intel_aux_map_init(device, &aux_map_allocator,
|
||||
&physical_device->info);
|
||||
if (!device->aux_map_ctx)
|
||||
|
|
@ -1200,33 +1265,7 @@ VkResult anv_CreateDevice(
|
|||
device->aux_map_ctx = NULL;
|
||||
}
|
||||
fail_aux_tt_pool:
|
||||
if (device->info->has_aux_map)
|
||||
anv_state_pool_finish(&device->aux_tt_pool);
|
||||
fail_push_descriptor_buffer_pool:
|
||||
if (device->vk.enabled_extensions.EXT_descriptor_buffer &&
|
||||
device->info->verx10 >= 125)
|
||||
anv_state_pool_finish(&device->push_descriptor_buffer_pool);
|
||||
fail_indirect_push_descriptor_pool:
|
||||
if (device->physical->indirect_descriptors)
|
||||
anv_state_pool_finish(&device->indirect_push_descriptor_pool);
|
||||
fail_binding_table_pool:
|
||||
anv_state_pool_finish(&device->binding_table_pool);
|
||||
fail_bindless_surface_state_pool:
|
||||
if (device->physical->indirect_descriptors)
|
||||
anv_state_pool_finish(&device->bindless_surface_state_pool);
|
||||
fail_internal_surface_state_pool:
|
||||
anv_state_pool_finish(&device->internal_surface_state_pool);
|
||||
fail_scratch_surface_state_pool:
|
||||
if (device->info->verx10 >= 125)
|
||||
anv_state_pool_finish(&device->scratch_surface_state_pool);
|
||||
fail_shader_vma_heap:
|
||||
anv_shader_heap_finish(&device->shader_heap);
|
||||
fail_custom_border_color_pool:
|
||||
anv_state_reserved_array_pool_finish(&device->custom_border_colors);
|
||||
fail_dynamic_state_pool:
|
||||
anv_state_pool_finish(&device->dynamic_state_pool);
|
||||
fail_general_state_pool:
|
||||
anv_state_pool_finish(&device->general_state_pool);
|
||||
anv_state_pools_finish(device);
|
||||
fail_batch_bo_pool:
|
||||
if (device->vk.enabled_extensions.KHR_acceleration_structure)
|
||||
anv_bo_pool_finish(&device->bvh_bo_pool);
|
||||
|
|
@ -1309,7 +1348,6 @@ void anv_DestroyDevice(
|
|||
device->companion_rcs_cmd_pool, NULL);
|
||||
}
|
||||
|
||||
anv_state_reserved_array_pool_finish(&device->custom_border_colors);
|
||||
#ifdef HAVE_VALGRIND
|
||||
/* We only need to free these to prevent valgrind errors. The backing
|
||||
* BO will go away in a couple of lines so we don't actually leak.
|
||||
|
|
@ -1361,23 +1399,8 @@ void anv_DestroyDevice(
|
|||
if (device->info->has_aux_map) {
|
||||
intel_aux_map_finish(device->aux_map_ctx);
|
||||
device->aux_map_ctx = NULL;
|
||||
anv_state_pool_finish(&device->aux_tt_pool);
|
||||
}
|
||||
if (device->vk.enabled_extensions.EXT_descriptor_buffer &&
|
||||
device->info->verx10 >= 125)
|
||||
anv_state_pool_finish(&device->push_descriptor_buffer_pool);
|
||||
if (device->physical->indirect_descriptors)
|
||||
anv_state_pool_finish(&device->indirect_push_descriptor_pool);
|
||||
anv_state_pool_finish(&device->binding_table_pool);
|
||||
if (device->info->verx10 >= 125)
|
||||
anv_state_pool_finish(&device->scratch_surface_state_pool);
|
||||
anv_state_pool_finish(&device->internal_surface_state_pool);
|
||||
if (device->physical->indirect_descriptors)
|
||||
anv_state_pool_finish(&device->bindless_surface_state_pool);
|
||||
|
||||
anv_shader_heap_finish(&device->shader_heap);
|
||||
anv_state_pool_finish(&device->dynamic_state_pool);
|
||||
anv_state_pool_finish(&device->general_state_pool);
|
||||
anv_state_pools_finish(device);
|
||||
|
||||
if (device->vk.enabled_extensions.KHR_acceleration_structure)
|
||||
anv_bo_pool_finish(&device->bvh_bo_pool);
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue