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ac/gpu_info: add gfx12_supports_dcc_write_compress_disable

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33255>
This commit is contained in:
Samuel Pitoiset 2025-01-30 06:30:01 -08:00 • committed by Marge Bot
parent 53c1b15f53
commit 827cef7f7f
2 changed files with 6 additions and 0 deletions
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5
src/amd/common/ac_gpu_info.c
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@ -1450,6 +1450,11 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
*/
info->gfx12_supports_display_dcc = info->gfx_level >= GFX12 && info->drm_minor >= 58;
/* AMDGPU always enables DCC compressed writes when a BO is moved back to
* VRAM until .60.
*/
info->gfx12_supports_dcc_write_compress_disable = info->gfx_level >= GFX12 && info->drm_minor >= 60;
info->has_stable_pstate = info->drm_minor >= 45;
if (info->gfx_level >= GFX12) {

1
src/amd/common/ac_gpu_info.h
View file

@ -161,6 +161,7 @@ struct radeon_info {
/* Allocate both aligned and unaligned DCC and use the retile blit. */
bool use_display_dcc_with_retile_blit;
bool gfx12_supports_display_dcc;
bool gfx12_supports_dcc_write_compress_disable;
/* Memory info. */
uint32_t pte_fragment_size;