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radeon: hopefully fixup radeon cube state emission for kms

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This commit is contained in:
Dave Airlie 2009-05-06 14:43:07 +10:00
parent d7f62e5405
commit 7f65fea95e
1 changed files with 11 additions and 3 deletions
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14
src/mesa/drivers/dri/radeon/radeon_state_init.c
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@ -465,10 +465,11 @@ static void cube_emit(GLcontext *ctx, struct radeon_state_atom *atom)
{
r100ContextPtr r100 = R100_CONTEXT(ctx);
BATCH_LOCALS(&r100->radeon);
uint32_t dwords = atom->cmd_size;
uint32_t dwords = 2;
int i = atom->idx, j;
radeonTexObj *t = r100->state.texture.unit[i].texobj;
radeon_mipmap_level *lvl;
uint32_t base_reg;
if (!(ctx->Texture.Unit[i]._ReallyEnabled & TEXTURE_CUBE_BIT))
return;
@ -479,10 +480,17 @@ static void cube_emit(GLcontext *ctx, struct radeon_state_atom *atom)
if (!t->mt)
return;
BEGIN_BATCH_NO_AUTOSTATE(dwords + 10);
OUT_BATCH_TABLE(atom->cmd, 3);
switch(i) {
case 1: base_reg = RADEON_PP_CUBIC_OFFSET_T1_0; break;
case 2: base_reg = RADEON_PP_CUBIC_OFFSET_T2_0; break;
default:
case 0: base_reg = RADEON_PP_CUBIC_OFFSET_T0_0; break;
};
BEGIN_BATCH_NO_AUTOSTATE(dwords + (5 * 4));
OUT_BATCH_TABLE(atom->cmd, 2);
lvl = &t->mt->levels[0];
for (j = 0; j < 5; j++) {
OUT_BATCH(CP_PACKET0(base_reg + (4 * (j-1)), 0));
OUT_BATCH_RELOC(lvl->faces[j].offset, t->mt->bo, lvl->faces[j].offset,
RADEON_GEM_DOMAIN_VRAM, 0, 0);
}