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anv: deal with Wa 14024015672 on the blorp path

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This is going to bite us a lot more when RCC BTP+BTI is enabled.

In particular this test will hang pretty reliably on LNL :

  dEQP-VK.renderpasses.dynamic_rendering.primary_cmd_buff.suballocation.multisample_resolve.layers_3.r32g32_sfloat.samples_4_baseLayer1

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: f66ff97d58 ("drirc/anv: implement steps to disable RHWO for Wa_14024015672")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39982>
This commit is contained in:
Lionel Landwerlin 2026-03-18 15:21:10 +02:00 • committed by Marge Bot
parent 2160e751e3
commit 7be8af1dad
3 changed files with 24 additions and 6 deletions
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13
src/intel/vulkan/anv_genX.h
View file

@ -554,3 +554,16 @@ genX(cmd_buffer_post_dispatch_wa)(struct anv_cmd_buffer *cmd_buffer)
"Wa_14025112257");
}
}
static inline void
genX(cmd_buffer_rhwo_wa_14024015672)(struct anv_cmd_buffer *cmd_buffer,
bool msaa_enabled)
{
struct anv_device *device = cmd_buffer->device;
const bool rhwo_opt_enable =
!device->physical->instance->intel_enable_wa_14024015672_msaa &&
msaa_enabled;
if (intel_needs_workaround(device->info, 14024015672) &&
cmd_buffer->state.pending_rhwo_optimization_enabled != rhwo_opt_enable)
cmd_buffer->state.pending_rhwo_optimization_enabled = rhwo_opt_enable;
}

9
src/intel/vulkan/genX_blorp_exec.c
View file

@ -304,6 +304,15 @@ blorp_exec_on_render(struct blorp_batch *batch,
genX(cmd_buffer_emit_hashing_mode)(cmd_buffer, params->x1 - params->x0,
params->y1 - params->y0, scale);
/* With Wa_14024015672, RHWO is initially disabled. We enable it for MSAA
* draws and disable for single sample unless explicitly disabled via drirc
* key.
*/
#if INTEL_WA_14024015672_GFX_VER
genX(cmd_buffer_rhwo_wa_14024015672)(cmd_buffer, params->num_samples > 1);
#endif
#if GFX_VER >= 11
/* The PIPE_CONTROL command description says:
*

8
src/intel/vulkan/genX_cmd_draw.c
View file

@ -830,12 +830,8 @@ cmd_buffer_flush_gfx_state(struct anv_cmd_buffer *cmd_buffer)
* drirc key.
*/
#if INTEL_WA_14024015672_GFX_VER
if (intel_needs_workaround(device->info, 14024015672) &&
BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_MS_RASTERIZATION_SAMPLES)) {
cmd_buffer->state.pending_rhwo_optimization_enabled =
!device->physical->instance->intel_enable_wa_14024015672_msaa &&
dyn->ms.rasterization_samples > 1;
}
genX(cmd_buffer_rhwo_wa_14024015672)(cmd_buffer,
dyn->ms.rasterization_samples > 1);
#endif
/* Apply any pending pipeline flushes we may have. We want to apply them