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intel/compiler/xe2: Use new sample_*_mlod messages

Browse source 
Note: a future commit will expand the sampler message type to the 6 bits
used on Xe2.

v2 (Francisco Jerez): Rebase on 07b9bfacc7 ("intel/compiler: Move
logical-send lowering to a separate file").

v3: Drop XE2_SAMPLER_MESSAGE_SAMPLE_BIAS_MLOD as it does not actually
exist. This resulted in some bigger changes in brw_disasm.c. Noticed
by Sagar.

v4: Now that XE2_SAMPLER_MESSAGE_SAMPLE_MLODc conflicts with
GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C, the determination of
min_lod_is_first must include devinfo->ver or previous platforms will
break.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27305>
This commit is contained in:
Ian Romanick 2022-07-22 17:24:13 -07:00 • committed by Marge Bot
parent 8690a6b546
commit 78e7f7b377
3 changed files with 79 additions and 8 deletions
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42
src/intel/compiler/brw_disasm.c
View file

@ -620,6 +620,33 @@ static const char *const gfx5_sampler_msg_type[] = {
[GFX7_SAMPLER_MESSAGE_SAMPLE_LD2DSS] = "ld2dss",
};
static const char *const xe2_sampler_msg_type[] = {
[GFX5_SAMPLER_MESSAGE_SAMPLE] = "sample",
[GFX5_SAMPLER_MESSAGE_SAMPLE_BIAS] = "sample_b",
[GFX5_SAMPLER_MESSAGE_SAMPLE_LOD] = "sample_l",
[GFX5_SAMPLER_MESSAGE_SAMPLE_COMPARE] = "sample_c",
[GFX5_SAMPLER_MESSAGE_SAMPLE_DERIVS] = "sample_d",
[GFX5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE] = "sample_b_c",
[GFX5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE] = "sample_l_c",
[GFX5_SAMPLER_MESSAGE_SAMPLE_LD] = "ld",
[GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4] = "gather4",
[GFX5_SAMPLER_MESSAGE_LOD] = "lod",
[GFX5_SAMPLER_MESSAGE_SAMPLE_RESINFO] = "resinfo",
[GFX6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO] = "sampleinfo",
[GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C] = "gather4_c",
[GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO] = "gather4_po",
[XE2_SAMPLER_MESSAGE_SAMPLE_MLOD] = "sample_mlod",
[XE2_SAMPLER_MESSAGE_SAMPLE_COMPARE_MLOD] = "sample_c_mlod",
[HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE] = "sample_d_c",
[GFX9_SAMPLER_MESSAGE_SAMPLE_LZ] = "sample_lz",
[GFX9_SAMPLER_MESSAGE_SAMPLE_C_LZ] = "sample_c_lz",
[GFX9_SAMPLER_MESSAGE_SAMPLE_LD_LZ] = "ld_lz",
[GFX9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W] = "ld2dms_w",
[GFX7_SAMPLER_MESSAGE_SAMPLE_LD_MCS] = "ld_mcs",
[GFX7_SAMPLER_MESSAGE_SAMPLE_LD2DMS] = "ld2dms",
[GFX7_SAMPLER_MESSAGE_SAMPLE_LD2DSS] = "ld2dss",
};
static const char *const gfx5_sampler_simd_mode[7] = {
[BRW_SAMPLER_SIMD_MODE_SIMD4X2] = "SIMD4x2",
[BRW_SAMPLER_SIMD_MODE_SIMD8] = "SIMD8",
@ -2284,7 +2311,20 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa,
brw_inst_math_msg_precision(devinfo, inst), &space);
break;
case BRW_SFID_SAMPLER:
if (devinfo->ver >= 5) {
if (devinfo->ver >= 20) {
err |= control(file, "sampler message", xe2_sampler_msg_type,
brw_sampler_desc_msg_type(devinfo, imm_desc),
&space);
err |= control(file, "sampler simd mode", gfx5_sampler_simd_mode,
brw_sampler_desc_simd_mode(devinfo, imm_desc),
&space);
if (brw_sampler_desc_return_format(devinfo, imm_desc)) {
string(file, " HP");
}
format(file, " Surface = %u Sampler = %u",
brw_sampler_desc_binding_table_index(devinfo, imm_desc),
brw_sampler_desc_sampler(devinfo, imm_desc));
} else if (devinfo->ver >= 5) {
err |= control(file, "sampler message", gfx5_sampler_msg_type,
brw_sampler_desc_msg_type(devinfo, imm_desc),
&space);

2
src/intel/compiler/brw_eu_defines.h
View file

@ -1483,6 +1483,8 @@ enum brw_message_target {
#define GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C 16
#define GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO 17
#define GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C 18
#define XE2_SAMPLER_MESSAGE_SAMPLE_MLOD 18
#define XE2_SAMPLER_MESSAGE_SAMPLE_COMPARE_MLOD 19
#define HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE 20
#define GFX9_SAMPLER_MESSAGE_SAMPLE_LZ 24
#define GFX9_SAMPLER_MESSAGE_SAMPLE_C_LZ 25

43
src/intel/compiler/brw_lower_logical_sends.cpp
View file

@ -837,58 +837,76 @@ is_high_sampler(const struct intel_device_info *devinfo, const fs_reg &sampler)
static unsigned
sampler_msg_type(const intel_device_info *devinfo,
opcode opcode, bool shadow_compare)
opcode opcode, bool shadow_compare, bool has_min_lod)
{
assert(devinfo->ver >= 5);
switch (opcode) {
case SHADER_OPCODE_TEX:
return shadow_compare ? GFX5_SAMPLER_MESSAGE_SAMPLE_COMPARE :
GFX5_SAMPLER_MESSAGE_SAMPLE;
if (devinfo->ver >= 20 && has_min_lod) {
return shadow_compare ? XE2_SAMPLER_MESSAGE_SAMPLE_COMPARE_MLOD :
XE2_SAMPLER_MESSAGE_SAMPLE_MLOD;
} else {
return shadow_compare ? GFX5_SAMPLER_MESSAGE_SAMPLE_COMPARE :
GFX5_SAMPLER_MESSAGE_SAMPLE;
}
case FS_OPCODE_TXB:
return shadow_compare ? GFX5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE :
GFX5_SAMPLER_MESSAGE_SAMPLE_BIAS;
case SHADER_OPCODE_TXL:
assert(!has_min_lod);
return shadow_compare ? GFX5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE :
GFX5_SAMPLER_MESSAGE_SAMPLE_LOD;
case SHADER_OPCODE_TXL_LZ:
assert(!has_min_lod);
return shadow_compare ? GFX9_SAMPLER_MESSAGE_SAMPLE_C_LZ :
GFX9_SAMPLER_MESSAGE_SAMPLE_LZ;
case SHADER_OPCODE_TXS:
case SHADER_OPCODE_IMAGE_SIZE_LOGICAL:
assert(!has_min_lod);
return GFX5_SAMPLER_MESSAGE_SAMPLE_RESINFO;
case SHADER_OPCODE_TXD:
assert(!shadow_compare || devinfo->verx10 >= 75);
return shadow_compare ? HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE :
GFX5_SAMPLER_MESSAGE_SAMPLE_DERIVS;
case SHADER_OPCODE_TXF:
assert(!has_min_lod);
return GFX5_SAMPLER_MESSAGE_SAMPLE_LD;
case SHADER_OPCODE_TXF_LZ:
assert(!has_min_lod);
assert(devinfo->ver >= 9);
return GFX9_SAMPLER_MESSAGE_SAMPLE_LD_LZ;
case SHADER_OPCODE_TXF_CMS_W:
assert(!has_min_lod);
assert(devinfo->ver >= 9);
return GFX9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W;
case SHADER_OPCODE_TXF_CMS:
assert(!has_min_lod);
return devinfo->ver >= 7 ? GFX7_SAMPLER_MESSAGE_SAMPLE_LD2DMS :
GFX5_SAMPLER_MESSAGE_SAMPLE_LD;
case SHADER_OPCODE_TXF_UMS:
assert(!has_min_lod);
assert(devinfo->ver >= 7);
return GFX7_SAMPLER_MESSAGE_SAMPLE_LD2DSS;
case SHADER_OPCODE_TXF_MCS:
assert(!has_min_lod);
assert(devinfo->ver >= 7);
return GFX7_SAMPLER_MESSAGE_SAMPLE_LD_MCS;
case SHADER_OPCODE_LOD:
assert(!has_min_lod);
return GFX5_SAMPLER_MESSAGE_LOD;
case SHADER_OPCODE_TG4:
assert(!has_min_lod);
assert(devinfo->ver >= 7);
return shadow_compare ? GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C :
GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4;
break;
case SHADER_OPCODE_TG4_OFFSET:
assert(!has_min_lod);
assert(devinfo->ver >= 7);
return shadow_compare ? GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C :
GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO;
case SHADER_OPCODE_SAMPLEINFO:
assert(!has_min_lod);
return GFX6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO;
default:
unreachable("not reached");
@ -1087,12 +1105,22 @@ lower_sampler_logical_send_gfx7(const fs_builder &bld, fs_inst *inst, opcode op,
op = SHADER_OPCODE_TXF_LZ;
}
/* On DG2 and newer platforms, min_lod is the first parameter specifically
/* On Xe2 and newer platforms, min_lod is the first parameter specifically
* so that a bunch of other, possibly unused, parameters don't need to also
* be included.
*/
const unsigned msg_type =
sampler_msg_type(devinfo, op, inst->shadow_compare);
sampler_msg_type(devinfo, op, inst->shadow_compare,
min_lod.file != BAD_FILE);
const bool min_lod_is_first = devinfo->ver >= 20 &&
(msg_type == XE2_SAMPLER_MESSAGE_SAMPLE_MLOD ||
msg_type == XE2_SAMPLER_MESSAGE_SAMPLE_COMPARE_MLOD);
if (min_lod_is_first) {
assert(min_lod.file != BAD_FILE);
bld.MOV(sources[length++], min_lod);
}
if (shadow_c.file != BAD_FILE) {
bld.MOV(sources[length], shadow_c);
@ -1251,7 +1279,7 @@ lower_sampler_logical_send_gfx7(const fs_builder &bld, fs_inst *inst, opcode op,
offset(coordinate, bld, i));
}
if (min_lod.file != BAD_FILE) {
if (min_lod.file != BAD_FILE && !min_lod_is_first) {
/* Account for all of the missing coordinate sources */
if (op == SHADER_OPCODE_TXD && devinfo->verx10 >= 125) {
/* On DG2 and newer platforms, sample_d can only be used with 1D and
@ -1305,7 +1333,8 @@ lower_sampler_logical_send_gfx7(const fs_builder &bld, fs_inst *inst, opcode op,
inst->mlen = mlen;
inst->header_size = header_size;
assert(msg_type == sampler_msg_type(devinfo, op, inst->shadow_compare));
assert(msg_type == sampler_msg_type(devinfo, op, inst->shadow_compare,
min_lod.file != BAD_FILE));
inst->sfid = BRW_SFID_SAMPLER;
if (surface.file == IMM &&