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pan/va: Use preload abstraction for blend shader regs
A couple of preloads were missed when implementing the preload register
abstraction.
This fix is not required prior to v15, but marking it as a bug fix for
consistency.
Fixes: 1f0370616a ("pan: Centralize preload registers")
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parent
2f6a4e7692
commit
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1 changed files with 5 additions and 2 deletions
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@ -4698,7 +4698,7 @@ bi_compile_variant(nir_shader *nir,
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uint64_t preload = first_block->reg_live_in;
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/* If multisampling is used with a blend shader, the blend shader needs
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* to access the sample coverage mask in r60 and the sample ID in r61.
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* to access the sample coverage mask and the sample ID.
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* Blend shaders run in the same context as fragment shaders, so if a
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* blend shader could run, we need to preload these registers
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* conservatively. There is believed to be little cost to doing so, so
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@ -4709,7 +4709,10 @@ bi_compile_variant(nir_shader *nir,
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* driver. We could unify the paths if the cost is acceptable.
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*/
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if (nir->info.stage == MESA_SHADER_FRAGMENT && ctx->arch >= 9)
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preload |= BITFIELD64_BIT(60) | BITFIELD64_BIT(61);
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preload |=
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BITFIELD64_BIT(
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bi_preload_reg(BI_PRELOAD_CUMULATIVE_COVERAGE, ctx->arch)) |
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BITFIELD64_BIT(bi_preload_reg(BI_PRELOAD_SAMPLE_ID, ctx->arch));
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info->ubo_mask |= ctx->ubo_mask;
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info->tls_size = MAX2(info->tls_size, ctx->info.tls_size);
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