From 769eddfecacf6951ca7513004e7d897ff67ce235 Mon Sep 17 00:00:00 2001 From: Lars-Ivar Hesselberg Simonsen Date: Mon, 20 Apr 2026 15:03:01 +0200 Subject: [PATCH] pan/va: Use preload abstraction for blend shader regs A couple of preloads were missed when implementing the preload register abstraction. This fix is not required prior to v15, but marking it as a bug fix for consistency. Fixes: 1f0370616a6 ("pan: Centralize preload registers") --- src/panfrost/compiler/bifrost/bifrost_compile.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/panfrost/compiler/bifrost/bifrost_compile.c b/src/panfrost/compiler/bifrost/bifrost_compile.c index 989a36b7046..8f459a1d8e6 100644 --- a/src/panfrost/compiler/bifrost/bifrost_compile.c +++ b/src/panfrost/compiler/bifrost/bifrost_compile.c @@ -4698,7 +4698,7 @@ bi_compile_variant(nir_shader *nir, uint64_t preload = first_block->reg_live_in; /* If multisampling is used with a blend shader, the blend shader needs - * to access the sample coverage mask in r60 and the sample ID in r61. + * to access the sample coverage mask and the sample ID. * Blend shaders run in the same context as fragment shaders, so if a * blend shader could run, we need to preload these registers * conservatively. There is believed to be little cost to doing so, so @@ -4709,7 +4709,10 @@ bi_compile_variant(nir_shader *nir, * driver. We could unify the paths if the cost is acceptable. */ if (nir->info.stage == MESA_SHADER_FRAGMENT && ctx->arch >= 9) - preload |= BITFIELD64_BIT(60) | BITFIELD64_BIT(61); + preload |= + BITFIELD64_BIT( + bi_preload_reg(BI_PRELOAD_CUMULATIVE_COVERAGE, ctx->arch)) | + BITFIELD64_BIT(bi_preload_reg(BI_PRELOAD_SAMPLE_ID, ctx->arch)); info->ubo_mask |= ctx->ubo_mask; info->tls_size = MAX2(info->tls_size, ctx->info.tls_size);