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radv: only set ALPHA_IS_ON_MSB if the image has DCC on GFX6-9

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This is technically incorrect to only check meta_offset which might be
non-zero for CMASK/FMASK but this applies to DCC only.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29308>
(cherry picked from commit 68c4d26691)
This commit is contained in:
Samuel Pitoiset 2024-05-17 14:48:39 +02:00 • committed by Eric Engestrom
parent f3e53f801c
commit 76005d3762
2 changed files with 3 additions and 2 deletions
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2
.pick_status.json
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@ -24,7 +24,7 @@
"description": "radv: only set ALPHA_IS_ON_MSB if the image has DCC on GFX6-9",
"nominated": true,
"nomination_type": 0,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": null,
"notes": null

3
src/amd/vulkan/radv_image_view.c
View file

@ -502,7 +502,8 @@ gfx6_make_texture_descriptor(struct radv_device *device, struct radv_image *imag
state[4] |= S_008F20_DEPTH(depth - 1);
state[5] |= S_008F24_LAST_ARRAY(last_layer);
}
if (!(image->planes[0].surface.flags & RADEON_SURF_Z_OR_SBUFFER) && image->planes[0].surface.meta_offset) {
if (radv_dcc_enabled(image, first_level)) {
state[6] = S_008F28_ALPHA_IS_ON_MSB(vi_alpha_is_on_msb(device, vk_format));
} else {
if (instance->drirc.disable_aniso_single_level) {