From 76005d3762eeb3ffc36c6699075fe84ca16aed87 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Fri, 17 May 2024 14:48:39 +0200 Subject: [PATCH] radv: only set ALPHA_IS_ON_MSB if the image has DCC on GFX6-9 This is technically incorrect to only check meta_offset which might be non-zero for CMASK/FMASK but this applies to DCC only. Cc: mesa-stable Signed-off-by: Samuel Pitoiset Part-of: (cherry picked from commit 68c4d26691769f83e471c85c0775b8c584061e86) --- .pick_status.json | 2 +- src/amd/vulkan/radv_image_view.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 9409ab01292..d5ac9d2fed8 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -24,7 +24,7 @@ "description": "radv: only set ALPHA_IS_ON_MSB if the image has DCC on GFX6-9", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/amd/vulkan/radv_image_view.c b/src/amd/vulkan/radv_image_view.c index de14b8e0803..937ed2758f3 100644 --- a/src/amd/vulkan/radv_image_view.c +++ b/src/amd/vulkan/radv_image_view.c @@ -502,7 +502,8 @@ gfx6_make_texture_descriptor(struct radv_device *device, struct radv_image *imag state[4] |= S_008F20_DEPTH(depth - 1); state[5] |= S_008F24_LAST_ARRAY(last_layer); } - if (!(image->planes[0].surface.flags & RADEON_SURF_Z_OR_SBUFFER) && image->planes[0].surface.meta_offset) { + + if (radv_dcc_enabled(image, first_level)) { state[6] = S_008F28_ALPHA_IS_ON_MSB(vi_alpha_is_on_msb(device, vk_format)); } else { if (instance->drirc.disable_aniso_single_level) {