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freedreno/ir3: Allow isam for non-bindless ssbo loads

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We already had the infrastructure for this, dating back to a5xx, so this
is low hanging fruit to hit the faster isam path.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20429>
This commit is contained in:
Rob Clark 2022-12-21 20:17:13 -08:00 • committed by Marge Bot
parent 7cf7bf8b9e
commit 75eb0d2891
4 changed files with 10 additions and 9 deletions
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1
src/freedreno/ci/freedreno-a618-fails.txt
View file

@ -8,7 +8,6 @@ KHR-GL45.gpu_shader_fp64.builtin.mod_dvec4,Fail
KHR-GL45.shader_subroutine.control_flow_and_returned_subroutine_values_used_as_subroutine_input,Fail
KHR-GL45.shader_image_load_store.basic-allFormats-store,Fail
KHR-GL45.shader_image_load_store.basic-allTargets-store,Fail
KHR-GL45.shader_image_load_store.non-layered_binding,Fail
KHR-GL45.shading_language_420pack.binding_images,Fail
KHR-GL45.compute_shader.conditional-dispatching,Fail
KHR-GL45.vertex_attrib_binding.advanced-largeStrideAndOffsetsNewAndLegacyAPI,Fail

1
src/freedreno/ci/freedreno-a630-fails.txt
View file

@ -8,7 +8,6 @@ KHR-GL45.gpu_shader_fp64.builtin.mod_dvec4,Fail
KHR-GL45.shader_subroutine.control_flow_and_returned_subroutine_values_used_as_subroutine_input,Fail
KHR-GL45.shader_image_load_store.basic-allFormats-store,Fail
KHR-GL45.shader_image_load_store.basic-allTargets-store,Fail
KHR-GL45.shader_image_load_store.non-layered_binding,Fail
KHR-GL45.shading_language_420pack.binding_images,Fail
KHR-GL45.compute_shader.conditional-dispatching,Fail
KHR-GL45.vertex_attrib_binding.advanced-largeStrideAndOffsetsNewAndLegacyAPI,Fail

15
src/freedreno/ir3/ir3_compiler_nir.c
View file

@ -1337,7 +1337,7 @@ struct tex_src_info {
* to handle with the image_mapping table..
*/
static struct tex_src_info
get_image_ssbo_samp_tex_src(struct ir3_context *ctx, nir_src *src)
get_image_ssbo_samp_tex_src(struct ir3_context *ctx, nir_src *src, bool image)
{
struct ir3_block *b = ctx->block;
struct tex_src_info info = {0};
@ -1382,9 +1382,13 @@ get_image_ssbo_samp_tex_src(struct ir3_context *ctx, nir_src *src)
} else {
info.flags |= IR3_INSTR_S2EN;
unsigned slot = nir_src_as_uint(*src);
unsigned tex_idx = ir3_image_to_tex(&ctx->so->image_mapping, slot);
unsigned tex_idx = image ?
ir3_image_to_tex(&ctx->so->image_mapping, slot) :
ir3_ssbo_to_tex(&ctx->so->image_mapping, slot);
struct ir3_instruction *texture, *sampler;
ctx->so->num_samp = MAX2(ctx->so->num_samp, tex_idx + 1);
texture = create_immed_typed(ctx->block, tex_idx, TYPE_U16);
sampler = create_immed_typed(ctx->block, tex_idx, TYPE_U16);
@ -1440,7 +1444,7 @@ emit_intrinsic_load_image(struct ir3_context *ctx, nir_intrinsic_instr *intr,
}
struct ir3_block *b = ctx->block;
struct tex_src_info info = get_image_ssbo_samp_tex_src(ctx, &intr->src[0]);
struct tex_src_info info = get_image_ssbo_samp_tex_src(ctx, &intr->src[0], true);
struct ir3_instruction *sam;
struct ir3_instruction *const *src0 = ir3_get_src(ctx, &intr->src[1]);
struct ir3_instruction *coords[4];
@ -1482,7 +1486,7 @@ emit_intrinsic_image_size_tex(struct ir3_context *ctx,
struct ir3_instruction **dst)
{
struct ir3_block *b = ctx->block;
struct tex_src_info info = get_image_ssbo_samp_tex_src(ctx, &intr->src[0]);
struct tex_src_info info = get_image_ssbo_samp_tex_src(ctx, &intr->src[0], true);
struct ir3_instruction *sam, *lod;
unsigned flags, ncoords = ir3_get_image_coords(intr, &flags);
type_t dst_type = nir_dest_bit_size(intr->dest) == 16 ? TYPE_U16 : TYPE_U32;
@ -1526,7 +1530,6 @@ emit_intrinsic_load_ssbo(struct ir3_context *ctx,
{
/* Note: isam currently can't handle vectorized loads/stores */
if (!(nir_intrinsic_access(intr) & ACCESS_CAN_REORDER) ||
!ir3_bindless_resource(intr->src[0]) ||
intr->dest.ssa.num_components > 1) {
ctx->funcs->emit_intrinsic_load_ssbo(ctx, intr, dst);
return;
@ -1535,7 +1538,7 @@ emit_intrinsic_load_ssbo(struct ir3_context *ctx,
struct ir3_block *b = ctx->block;
struct ir3_instruction *offset = ir3_get_src(ctx, &intr->src[2])[0];
struct ir3_instruction *coords = ir3_collect(b, offset, create_immed(b, 0));
struct tex_src_info info = get_image_ssbo_samp_tex_src(ctx, &intr->src[0]);
struct tex_src_info info = get_image_ssbo_samp_tex_src(ctx, &intr->src[0], false);
unsigned num_components = intr->dest.ssa.num_components;
struct ir3_instruction *sam =

2
src/gallium/drivers/freedreno/a6xx/fd6_context.c
View file

@ -161,7 +161,7 @@ setup_state_map(struct fd_context *ctx)
BIT(FD6_GROUP_BLEND));
fd_context_add_map(ctx, FD_DIRTY_BLEND_COLOR, BIT(FD6_GROUP_BLEND_COLOR));
fd_context_add_map(ctx, FD_DIRTY_SSBO | FD_DIRTY_IMAGE | FD_DIRTY_PROG,
BIT(FD6_GROUP_IBO));
BIT(FD6_GROUP_IBO) | BIT(FD6_GROUP_FS_TEX));
fd_context_add_map(ctx, FD_DIRTY_PROG,
BIT(FD6_GROUP_VS_TEX) | BIT(FD6_GROUP_HS_TEX) |
BIT(FD6_GROUP_DS_TEX) | BIT(FD6_GROUP_GS_TEX) |