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nir: Mark nir_intrinsic_load_global_block_intel as divergent

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This is divergent because it specifically loads sequential values into
successive SIMD lanes.

No shader-db or fossil-db changes on any Intel platform.

Fixes: 9f44a26462 ("nir/divergence: handle load_global_block_intel")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27044>
This commit is contained in:
Ian Romanick 2024-01-11 13:14:47 -08:00
parent 56a3f031f4
commit 75de4458a1
1 changed files with 7 additions and 1 deletions
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8
src/compiler/nir/nir_divergence_analysis.c
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@ -208,7 +208,6 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr,
case nir_intrinsic_load_resume_shader_address_amd:
case nir_intrinsic_load_global_const_block_intel:
case nir_intrinsic_load_reloc_const_intel:
case nir_intrinsic_load_global_block_intel:
case nir_intrinsic_load_btd_global_arg_addr_intel:
case nir_intrinsic_load_btd_local_arg_addr_intel:
case nir_intrinsic_load_mesh_inline_data_intel:
@ -238,6 +237,13 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr,
is_divergent = false;
break;
/* This is divergent because it specifically loads sequential values into
* successive SIMD lanes.
*/
case nir_intrinsic_load_global_block_intel:
is_divergent = true;
break;
case nir_intrinsic_decl_reg:
is_divergent = nir_intrinsic_divergent(instr);
break;