From 75de4458a1350ac6f3843e4f8da7a69717c92687 Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Thu, 11 Jan 2024 13:14:47 -0800 Subject: [PATCH] nir: Mark nir_intrinsic_load_global_block_intel as divergent This is divergent because it specifically loads sequential values into successive SIMD lanes. No shader-db or fossil-db changes on any Intel platform. Fixes: 9f44a264623 ("nir/divergence: handle load_global_block_intel") Reviewed-by: Lionel Landwerlin Part-of: --- src/compiler/nir/nir_divergence_analysis.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c index 25891c8c575..0aad02c2f0f 100644 --- a/src/compiler/nir/nir_divergence_analysis.c +++ b/src/compiler/nir/nir_divergence_analysis.c @@ -208,7 +208,6 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr, case nir_intrinsic_load_resume_shader_address_amd: case nir_intrinsic_load_global_const_block_intel: case nir_intrinsic_load_reloc_const_intel: - case nir_intrinsic_load_global_block_intel: case nir_intrinsic_load_btd_global_arg_addr_intel: case nir_intrinsic_load_btd_local_arg_addr_intel: case nir_intrinsic_load_mesh_inline_data_intel: @@ -238,6 +237,13 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr, is_divergent = false; break; + /* This is divergent because it specifically loads sequential values into + * successive SIMD lanes. + */ + case nir_intrinsic_load_global_block_intel: + is_divergent = true; + break; + case nir_intrinsic_decl_reg: is_divergent = nir_intrinsic_divergent(instr); break;