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asahi: Do not support masking with spilled RTs

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Extra complexity for this interaction, not worth it until we have an actual use
case IMHO.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
This commit is contained in:
Alyssa Rosenzweig 2023-06-14 17:53:38 -04:00 • committed by Marge Bot
parent fa0e671b7b
commit 73fb1543fd
1 changed files with 6 additions and 0 deletions
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6
src/asahi/lib/agx_tilebuffer.c
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@ -123,6 +123,12 @@ agx_tilebuffer_physical_format(struct agx_tilebuffer_layout *tib, unsigned rt)
bool
agx_tilebuffer_supports_mask(struct agx_tilebuffer_layout *tib, unsigned rt)
{
/* We don't bother support masking with spilled render targets. This might be
* optimized in the future but spilling is so rare anyway it's not worth it.
*/
if (tib->spilled[rt])
return false;
enum pipe_format fmt = agx_tilebuffer_physical_format(tib, rt);
return agx_internal_format_supports_mask((enum agx_internal_formats)fmt);
}