From 73fb1543fd50e707d20c47a8677ff26223909c9d Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 14 Jun 2023 17:53:38 -0400 Subject: [PATCH] asahi: Do not support masking with spilled RTs Extra complexity for this interaction, not worth it until we have an actual use case IMHO. Signed-off-by: Alyssa Rosenzweig Part-of: --- src/asahi/lib/agx_tilebuffer.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/asahi/lib/agx_tilebuffer.c b/src/asahi/lib/agx_tilebuffer.c index c427462c614..9b83801a5b3 100644 --- a/src/asahi/lib/agx_tilebuffer.c +++ b/src/asahi/lib/agx_tilebuffer.c @@ -123,6 +123,12 @@ agx_tilebuffer_physical_format(struct agx_tilebuffer_layout *tib, unsigned rt) bool agx_tilebuffer_supports_mask(struct agx_tilebuffer_layout *tib, unsigned rt) { + /* We don't bother support masking with spilled render targets. This might be + * optimized in the future but spilling is so rare anyway it's not worth it. + */ + if (tib->spilled[rt]) + return false; + enum pipe_format fmt = agx_tilebuffer_physical_format(tib, rt); return agx_internal_format_supports_mask((enum agx_internal_formats)fmt); }