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r300: re-format using clang-format

Browse source 
No manual changes here, this is simply running
$ ninja -C build/ clang-format

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37224>
This commit is contained in:
Christian Gmeiner 2025-09-08 13:06:51 +02:00 • committed by Marge Bot
parent 92e329ba5a
commit 72ba6bbbe3
13 changed files with 88 additions and 83 deletions
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72
src/gallium/drivers/r300/compiler/nir_to_rc.c
View file

@ -11,8 +11,6 @@
#include "compiler/nir/nir_worklist.h"
#include "compiler/radeon_code.h"
#include "compiler/radeon_program_constants.h"
#include "r300_nir.h"
#include "r300_screen.h"
#include "pipe/p_screen.h"
#include "pipe/p_state.h"
#include "tgsi/tgsi_dump.h"
@ -126,53 +124,53 @@ ntr_insn(struct ntr_compile *c, enum tgsi_opcode opcode, struct ureg_dst dst, st
return util_dynarray_top_ptr(&c->cur_block->insns, struct ntr_insn);
}
#define OP00(op) \
static inline void ntr_##op(struct ntr_compile *c) \
{ \
ntr_insn(c, TGSI_OPCODE_##op, ureg_dst_undef(), ureg_src_undef(), ureg_src_undef(), \
ureg_src_undef(), ureg_src_undef()); \
#define OP00(op) \
static inline void ntr_##op(struct ntr_compile *c) \
{ \
ntr_insn(c, TGSI_OPCODE_##op, ureg_dst_undef(), ureg_src_undef(), ureg_src_undef(), \
ureg_src_undef(), ureg_src_undef()); \
}
#define OP01(op) \
static inline void ntr_##op(struct ntr_compile *c, struct ureg_src src0) \
{ \
ntr_insn(c, TGSI_OPCODE_##op, ureg_dst_undef(), src0, ureg_src_undef(), ureg_src_undef(), \
ureg_src_undef()); \
#define OP01(op) \
static inline void ntr_##op(struct ntr_compile *c, struct ureg_src src0) \
{ \
ntr_insn(c, TGSI_OPCODE_##op, ureg_dst_undef(), src0, ureg_src_undef(), ureg_src_undef(), \
ureg_src_undef()); \
}
#define OP10(op) \
static inline void ntr_##op(struct ntr_compile *c, struct ureg_dst dst) \
{ \
ntr_insn(c, TGSI_OPCODE_##op, dst, ureg_src_undef(), ureg_src_undef(), ureg_src_undef(), \
ureg_src_undef()); \
#define OP10(op) \
static inline void ntr_##op(struct ntr_compile *c, struct ureg_dst dst) \
{ \
ntr_insn(c, TGSI_OPCODE_##op, dst, ureg_src_undef(), ureg_src_undef(), ureg_src_undef(), \
ureg_src_undef()); \
}
#define OP11(op) \
static inline void ntr_##op(struct ntr_compile *c, struct ureg_dst dst, struct ureg_src src0) \
{ \
ntr_insn(c, TGSI_OPCODE_##op, dst, src0, ureg_src_undef(), ureg_src_undef(), \
ureg_src_undef()); \
#define OP11(op) \
static inline void ntr_##op(struct ntr_compile *c, struct ureg_dst dst, struct ureg_src src0) \
{ \
ntr_insn(c, TGSI_OPCODE_##op, dst, src0, ureg_src_undef(), ureg_src_undef(), \
ureg_src_undef()); \
}
#define OP12(op) \
static inline void ntr_##op(struct ntr_compile *c, struct ureg_dst dst, struct ureg_src src0, \
struct ureg_src src1) \
{ \
ntr_insn(c, TGSI_OPCODE_##op, dst, src0, src1, ureg_src_undef(), ureg_src_undef()); \
#define OP12(op) \
static inline void ntr_##op(struct ntr_compile *c, struct ureg_dst dst, struct ureg_src src0, \
struct ureg_src src1) \
{ \
ntr_insn(c, TGSI_OPCODE_##op, dst, src0, src1, ureg_src_undef(), ureg_src_undef()); \
}
#define OP13(op) \
static inline void ntr_##op(struct ntr_compile *c, struct ureg_dst dst, struct ureg_src src0, \
struct ureg_src src1, struct ureg_src src2) \
{ \
ntr_insn(c, TGSI_OPCODE_##op, dst, src0, src1, src2, ureg_src_undef()); \
#define OP13(op) \
static inline void ntr_##op(struct ntr_compile *c, struct ureg_dst dst, struct ureg_src src0, \
struct ureg_src src1, struct ureg_src src2) \
{ \
ntr_insn(c, TGSI_OPCODE_##op, dst, src0, src1, src2, ureg_src_undef()); \
}
#define OP14(op) \
static inline void ntr_##op(struct ntr_compile *c, struct ureg_dst dst, struct ureg_src src0, \
struct ureg_src src1, struct ureg_src src2, struct ureg_src src3) \
{ \
ntr_insn(c, TGSI_OPCODE_##op, dst, src0, src1, src2, src3); \
#define OP14(op) \
static inline void ntr_##op(struct ntr_compile *c, struct ureg_dst dst, struct ureg_src src0, \
struct ureg_src src1, struct ureg_src src2, struct ureg_src src3) \
{ \
ntr_insn(c, TGSI_OPCODE_##op, dst, src0, src1, src2, src3); \
}
/* We hand-craft our tex instructions */

10
src/gallium/drivers/r300/compiler/r300_fragprog_emit.c
View file

@ -32,13 +32,13 @@ struct r300_emit_state {
uint32_t node_flags;
};
#define PROG_CODE \
struct r300_fragment_program_compiler *c = emit->compiler; \
#define PROG_CODE \
struct r300_fragment_program_compiler *c = emit->compiler; \
struct r300_fragment_program_code *code = &c->code->code.r300
#define error(fmt, args...) \
do { \
rc_error(&c->Base, "%s::%s(): " fmt, __FILE__, __func__, ##args); \
#define error(fmt, args...) \
do { \
rc_error(&c->Base, "%s::%s(): " fmt, __FILE__, __func__, ##args); \
} while (0)
static unsigned int

2
src/gallium/drivers/r300/compiler/r300_fragprog_swizzle.c
View file

@ -17,7 +17,7 @@
#include "r300_reg.h"
#include "radeon_compiler.h"
#define MAKE_SWZ3(x, y, z) \
#define MAKE_SWZ3(x, y, z) \
(RC_MAKE_SWIZZLE(RC_SWIZZLE_##x, RC_SWIZZLE_##y, RC_SWIZZLE_##z, RC_SWIZZLE_ZERO))
struct swizzle_data {

14
src/gallium/drivers/r300/compiler/r300_nir.c
View file

@ -128,11 +128,11 @@ remove_clip_vertex(nir_builder *b, nir_instr *instr, UNUSED void *_)
if (deref->deref_type == nir_deref_type_var &&
deref->var->data.mode == nir_var_shader_out &&
deref->var->data.location == VARYING_SLOT_CLIP_VERTEX) {
nir_foreach_use_safe(src, &deref->def) {
nir_instr_remove(nir_src_parent_instr(src));
}
nir_instr_remove(instr);
return true;
nir_foreach_use_safe (src, &deref->def) {
nir_instr_remove(nir_src_parent_instr(src));
}
nir_instr_remove(instr);
return true;
}
return false;
}
@ -147,12 +147,12 @@ r300_optimize_nir(struct nir_shader *s, struct r300_screen *screen)
if (nir_shader_instructions_pass(s, remove_clip_vertex,
nir_metadata_control_flow, NULL)) {
unsigned clip_vertex_location = 0;
nir_foreach_variable_with_modes(var, s, nir_var_shader_out) {
nir_foreach_variable_with_modes (var, s, nir_var_shader_out) {
if (var->data.location == VARYING_SLOT_CLIP_VERTEX) {
clip_vertex_location = var->data.driver_location;
}
}
nir_foreach_variable_with_modes(var, s, nir_var_shader_out) {
nir_foreach_variable_with_modes (var, s, nir_var_shader_out) {
if (var->data.driver_location > clip_vertex_location) {
var->data.driver_location--;
}

4
src/gallium/drivers/r300/compiler/r300_nir.h
View file

@ -50,7 +50,7 @@ static inline bool
is_only_used_by_intrinsic(const nir_alu_instr *instr, nir_intrinsic_op op)
{
bool is_used = false;
nir_foreach_use(src, &instr->def) {
nir_foreach_use (src, &instr->def) {
is_used = true;
nir_instr *user_instr = nir_src_parent_instr(src);
@ -60,7 +60,7 @@ is_only_used_by_intrinsic(const nir_alu_instr *instr, nir_intrinsic_op op)
const nir_intrinsic_instr *const user_intrinsic = nir_instr_as_intrinsic(user_instr);
if (user_intrinsic->intrinsic != op)
return false;
return false;
}
return is_used;
}

6
src/gallium/drivers/r300/compiler/r3xx_vertprog.c
View file

@ -25,9 +25,9 @@
* Take an already-setup and valid source then swizzle it appropriately to
* obtain a constant ZERO or ONE source.
*/
#define __CONST(x, y) \
(PVS_SRC_OPERAND(t_src_index(vp, &vpi->SrcReg[x]), t_swizzle(y), t_swizzle(y), t_swizzle(y), \
t_swizzle(y), t_src_class(vpi->SrcReg[x].File), RC_MASK_NONE) | \
#define __CONST(x, y) \
(PVS_SRC_OPERAND(t_src_index(vp, &vpi->SrcReg[x]), t_swizzle(y), t_swizzle(y), t_swizzle(y), \
t_swizzle(y), t_src_class(vpi->SrcReg[x].File), RC_MASK_NONE) | \
(vpi->SrcReg[x].RelAddr << 4))
static unsigned long

10
src/gallium/drivers/r300/compiler/r500_fragprog_emit.c
View file

@ -25,9 +25,9 @@
#define PROG_CODE struct r500_fragment_program_code *code = &c->code->code.r500
#define error(fmt, args...) \
do { \
rc_error(&c->Base, "%s::%s(): " fmt "\n", __FILE__, __func__, ##args); \
#define error(fmt, args...) \
do { \
rc_error(&c->Base, "%s::%s(): " fmt "\n", __FILE__, __func__, ##args); \
} while (0)
struct branch_info {
@ -544,8 +544,8 @@ emit_flowcontrol(struct emit_state *s, struct rc_instruction *inst)
| R500_FC_B_POP_CNT(1);
s->Code->inst[branch->Endif].inst3 = R500_FC_JUMP_ADDR(branch->Endif + 1);
s->Code->inst[branch->If].inst2 = R500_FC_OP_JUMP | R500_FC_A_OP_NONE /* no address stack */
| R500_FC_JUMP_FUNC(0x0f) /* jump if ALU result is false */
| R500_FC_B_OP0_INCR /* increment branch counter if stay */
| R500_FC_JUMP_FUNC(0x0f) /* jump if ALU result is false */
| R500_FC_B_OP0_INCR /* increment branch counter if stay */
| R500_FC_IGNORE_UNCOVERED;
if (branch->Else >= 0) {

12
src/gallium/drivers/r300/compiler/radeon_compiler.h
View file

@ -14,13 +14,15 @@
#define RC_DBG_LOG (1 << 0)
#define RC_MATH_DX 0x00
#define RC_MATH_IEEE 0x01
#define RC_MATH_FF 0x02
#define RC_MATH_DX 0x00
#define RC_MATH_IEEE 0x01
#define RC_MATH_FF 0x02
struct rc_swizzle_caps;
enum rc_program_type { RC_VERTEX_PROGRAM, RC_FRAGMENT_PROGRAM, RC_NUM_PROGRAM_TYPES };
enum rc_program_type { RC_VERTEX_PROGRAM,
RC_FRAGMENT_PROGRAM,
RC_NUM_PROGRAM_TYPES };
struct radeon_compiler {
struct memory_pool Pool;
@ -126,7 +128,7 @@ struct radeon_compiler_pass {
int dump; /* Dump the program if Debug == 1? */
int predicate; /* Run this pass? */
void (*run)(struct radeon_compiler *c, void *user); /* The main entrypoint. */
void *user; /* Optional parameter which is passed to the run function. */
void *user; /* Optional parameter which is passed to the run function. */
};
struct rc_program_stats {

8
src/gallium/drivers/r300/compiler/radeon_inline_literals.c
View file

@ -15,10 +15,10 @@
#define VERBOSE 0
#define DBG(...) \
do { \
if (VERBOSE) \
fprintf(stderr, __VA_ARGS__); \
#define DBG(...) \
do { \
if (VERBOSE) \
fprintf(stderr, __VA_ARGS__); \
} while (0)
/* IEEE-754:

8
src/gallium/drivers/r300/compiler/radeon_pair_schedule.c
View file

@ -17,10 +17,10 @@
#define VERBOSE 0
#define DBG(...) \
do { \
if (VERBOSE) \
fprintf(stderr, __VA_ARGS__); \
#define DBG(...) \
do { \
if (VERBOSE) \
fprintf(stderr, __VA_ARGS__); \
} while (0)
struct schedule_instruction {

3
src/gallium/drivers/r300/compiler/radeon_program.h
View file

@ -103,7 +103,8 @@ struct rc_sub_instruction {
rc_omod_op Omod;
};
typedef enum { RC_INSTRUCTION_NORMAL = 0, RC_INSTRUCTION_PAIR } rc_instruction_type;
typedef enum { RC_INSTRUCTION_NORMAL = 0,
RC_INSTRUCTION_PAIR } rc_instruction_type;
struct rc_instruction {
struct rc_instruction *Prev;

14
src/gallium/drivers/r300/compiler/radeon_program_constants.h
View file

@ -103,9 +103,9 @@ is_swizzle_inline_constant(rc_swizzle swizzle)
#define RC_MAKE_SWIZZLE_SMEAR(a) RC_MAKE_SWIZZLE((a), (a), (a), (a))
#define GET_SWZ(swz, idx) (((swz) >> ((idx) * 3)) & 0x7)
#define GET_BIT(msk, idx) (((msk) >> (idx)) & 0x1)
#define SET_SWZ(swz, idx, newv) \
do { \
(swz) = ((swz) & ~(7 << ((idx) * 3))) | ((newv) << ((idx) * 3)); \
#define SET_SWZ(swz, idx, newv) \
do { \
(swz) = ((swz) & ~(7 << ((idx) * 3))) | ((newv) << ((idx) * 3)); \
} while (0)
#define RC_SWIZZLE_XYZW RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_W)
@ -138,7 +138,9 @@ is_swizzle_inline_constant(rc_swizzle swizzle)
#define RC_MASK_XYZW (RC_MASK_X | RC_MASK_Y | RC_MASK_Z | RC_MASK_W)
/*@}*/
typedef enum { RC_ALURESULT_NONE = 0, RC_ALURESULT_X, RC_ALURESULT_W } rc_write_aluresult;
typedef enum { RC_ALURESULT_NONE = 0,
RC_ALURESULT_X,
RC_ALURESULT_W } rc_write_aluresult;
typedef enum {
RC_PRESUB_NONE = 0,
@ -186,6 +188,8 @@ rc_presubtract_src_reg_count(rc_presubtract_op op)
#define RC_SOURCE_RGB 0x1
#define RC_SOURCE_ALPHA 0x2
typedef enum { RC_PRED_DISABLED, RC_PRED_SET, RC_PRED_INV } rc_predicate_mode;
typedef enum { RC_PRED_DISABLED,
RC_PRED_SET,
RC_PRED_INV } rc_predicate_mode;
#endif /* RADEON_PROGRAM_CONSTANTS_H */

8
src/gallium/drivers/r300/compiler/radeon_regalloc.c
View file

@ -9,10 +9,10 @@
#define VERBOSE 0
#define DBG(...) \
do { \
if (VERBOSE) \
fprintf(stderr, __VA_ARGS__); \
#define DBG(...) \
do { \
if (VERBOSE) \
fprintf(stderr, __VA_ARGS__); \
} while (0)
const struct rc_class rc_class_list_vp[] = {